[llvm] [MachineLICM] Fix incorrect CSE on hoisted const load (PR #73007)

[David Sherwood via llvm-commits]

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@@ -1422,6 +1422,11 @@ bool MachineLICMBase::EliminateCSE(
   if (MI->isImplicitDef())
     return false;
 
+  // Do not CSE normal loads because between them could be store instructions
+  // that change the loaded value
+  if (MI->mayLoad() && !MI->isDereferenceableInvariantLoad())
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david-arm wrote:

Is this still guaranteed to be safe for dereferenceable invariant loads? Could we have a situation where we hoist these memory accesses from a loop because they appear invariant:

  load a
  store b
  load a

where store b could alias with load a? In this case we will hoist all three to the preheader - do we also CSE the two loads? If so, that's unsafe too.

https://github.com/llvm/llvm-project/pull/73007