[llvm] [SelectionDAG] Add instantiated OPC_CheckType (PR #73281)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 23 20:02:58 PST 2023
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-selectiondag
Author: Wang Pengcheng (wangpc-pp)
<details>
<summary>Changes</summary>
The most common type is i32 or i64 so we add `OPC_CheckTypeI32` and
`OPC_CheckTypeI64` to save one byte.
Overall this reduces the llc binary size with all in-tree targets by
about 29K.
---
Full diff: https://github.com/llvm/llvm-project/pull/73281.diff
3 Files Affected:
- (modified) llvm/include/llvm/CodeGen/SelectionDAGISel.h (+46-15)
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (+54-26)
- (modified) llvm/utils/TableGen/DAGISelMatcherEmitter.cpp (+10-3)
``````````diff
diff --git a/llvm/include/llvm/CodeGen/SelectionDAGISel.h b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
index ffeb4959ba7d076..21d4a5b3d60399c 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGISel.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGISel.h
@@ -124,17 +124,31 @@ class SelectionDAGISel : public MachineFunctionPass {
enum BuiltinOpcodes {
OPC_Scope,
OPC_RecordNode,
- OPC_RecordChild0, OPC_RecordChild1, OPC_RecordChild2, OPC_RecordChild3,
- OPC_RecordChild4, OPC_RecordChild5, OPC_RecordChild6, OPC_RecordChild7,
+ OPC_RecordChild0,
+ OPC_RecordChild1,
+ OPC_RecordChild2,
+ OPC_RecordChild3,
+ OPC_RecordChild4,
+ OPC_RecordChild5,
+ OPC_RecordChild6,
+ OPC_RecordChild7,
OPC_RecordMemRef,
OPC_CaptureGlueInput,
OPC_MoveChild,
- OPC_MoveChild0, OPC_MoveChild1, OPC_MoveChild2, OPC_MoveChild3,
- OPC_MoveChild4, OPC_MoveChild5, OPC_MoveChild6, OPC_MoveChild7,
+ OPC_MoveChild0,
+ OPC_MoveChild1,
+ OPC_MoveChild2,
+ OPC_MoveChild3,
+ OPC_MoveChild4,
+ OPC_MoveChild5,
+ OPC_MoveChild6,
+ OPC_MoveChild7,
OPC_MoveParent,
OPC_CheckSame,
- OPC_CheckChild0Same, OPC_CheckChild1Same,
- OPC_CheckChild2Same, OPC_CheckChild3Same,
+ OPC_CheckChild0Same,
+ OPC_CheckChild1Same,
+ OPC_CheckChild2Same,
+ OPC_CheckChild3Same,
OPC_CheckPatternPredicate,
OPC_CheckPatternPredicate2,
OPC_CheckPredicate,
@@ -142,18 +156,31 @@ class SelectionDAGISel : public MachineFunctionPass {
OPC_CheckOpcode,
OPC_SwitchOpcode,
OPC_CheckType,
+ // Space-optimized forms that implicitly encode VT.
+ OPC_CheckTypeI32,
+ OPC_CheckTypeI64,
OPC_CheckTypeRes,
OPC_SwitchType,
- OPC_CheckChild0Type, OPC_CheckChild1Type, OPC_CheckChild2Type,
- OPC_CheckChild3Type, OPC_CheckChild4Type, OPC_CheckChild5Type,
- OPC_CheckChild6Type, OPC_CheckChild7Type,
+ OPC_CheckChild0Type,
+ OPC_CheckChild1Type,
+ OPC_CheckChild2Type,
+ OPC_CheckChild3Type,
+ OPC_CheckChild4Type,
+ OPC_CheckChild5Type,
+ OPC_CheckChild6Type,
+ OPC_CheckChild7Type,
OPC_CheckInteger,
- OPC_CheckChild0Integer, OPC_CheckChild1Integer, OPC_CheckChild2Integer,
- OPC_CheckChild3Integer, OPC_CheckChild4Integer,
- OPC_CheckCondCode, OPC_CheckChild2CondCode,
+ OPC_CheckChild0Integer,
+ OPC_CheckChild1Integer,
+ OPC_CheckChild2Integer,
+ OPC_CheckChild3Integer,
+ OPC_CheckChild4Integer,
+ OPC_CheckCondCode,
+ OPC_CheckChild2CondCode,
OPC_CheckValueType,
OPC_CheckComplexPat,
- OPC_CheckAndImm, OPC_CheckOrImm,
+ OPC_CheckAndImm,
+ OPC_CheckOrImm,
OPC_CheckImmAllOnesV,
OPC_CheckImmAllZerosV,
OPC_CheckFoldableChainNode,
@@ -172,10 +199,14 @@ class SelectionDAGISel : public MachineFunctionPass {
OPC_EmitNodeXForm,
OPC_EmitNode,
// Space-optimized forms that implicitly encode number of result VTs.
- OPC_EmitNode0, OPC_EmitNode1, OPC_EmitNode2,
+ OPC_EmitNode0,
+ OPC_EmitNode1,
+ OPC_EmitNode2,
OPC_MorphNodeTo,
// Space-optimized forms that implicitly encode number of result VTs.
- OPC_MorphNodeTo0, OPC_MorphNodeTo1, OPC_MorphNodeTo2,
+ OPC_MorphNodeTo0,
+ OPC_MorphNodeTo1,
+ OPC_MorphNodeTo2,
OPC_CompleteMatch,
// Contains offset in table for pattern being selected
OPC_Coverage
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 7d9bebdca127224..2ee897ae5c60771 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -2711,24 +2711,23 @@ CheckOpcode(const unsigned char *MatcherTable, unsigned &MatcherIndex,
return N->getOpcode() == Opc;
}
-LLVM_ATTRIBUTE_ALWAYS_INLINE static bool
-CheckType(const unsigned char *MatcherTable, unsigned &MatcherIndex, SDValue N,
- const TargetLowering *TLI, const DataLayout &DL) {
- MVT::SimpleValueType VT = (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
- if (N.getValueType() == VT) return true;
+LLVM_ATTRIBUTE_ALWAYS_INLINE static bool CheckType(MVT::SimpleValueType VT,
+ SDValue N,
+ const TargetLowering *TLI,
+ const DataLayout &DL) {
+ if (N.getValueType() == VT)
+ return true;
// Handle the case when VT is iPTR.
return VT == MVT::iPTR && N.getValueType() == TLI->getPointerTy(DL);
}
LLVM_ATTRIBUTE_ALWAYS_INLINE static bool
-CheckChildType(const unsigned char *MatcherTable, unsigned &MatcherIndex,
- SDValue N, const TargetLowering *TLI, const DataLayout &DL,
- unsigned ChildNo) {
+CheckChildType(MVT::SimpleValueType VT, SDValue N, const TargetLowering *TLI,
+ const DataLayout &DL, unsigned ChildNo) {
if (ChildNo >= N.getNumOperands())
- return false; // Match fails if out of range child #.
- return ::CheckType(MatcherTable, MatcherIndex, N.getOperand(ChildNo), TLI,
- DL);
+ return false; // Match fails if out of range child #.
+ return ::CheckType(VT, N.getOperand(ChildNo), TLI, DL);
}
LLVM_ATTRIBUTE_ALWAYS_INLINE static bool
@@ -2826,7 +2825,8 @@ static unsigned IsPredicateKnownToFail(const unsigned char *Table,
bool &Result,
const SelectionDAGISel &SDISel,
SmallVectorImpl<std::pair<SDValue, SDNode*>> &RecordedNodes) {
- switch (Table[Index++]) {
+ unsigned Opcode = Table[Index++];
+ switch (Opcode) {
default:
Result = false;
return Index-1; // Could not evaluate this predicate.
@@ -2853,13 +2853,27 @@ static unsigned IsPredicateKnownToFail(const unsigned char *Table,
Result = !::CheckOpcode(Table, Index, N.getNode());
return Index;
case SelectionDAGISel::OPC_CheckType:
- Result = !::CheckType(Table, Index, N, SDISel.TLI,
- SDISel.CurDAG->getDataLayout());
+ case SelectionDAGISel::OPC_CheckTypeI32:
+ case SelectionDAGISel::OPC_CheckTypeI64: {
+ MVT::SimpleValueType VT;
+ switch (Opcode) {
+ case SelectionDAGISel::OPC_CheckTypeI32:
+ VT = MVT::i32;
+ break;
+ case SelectionDAGISel::OPC_CheckTypeI64:
+ VT = MVT::i64;
+ break;
+ default:
+ VT = (MVT::SimpleValueType)Table[Index++];
+ break;
+ }
+ Result = !::CheckType(VT, N, SDISel.TLI, SDISel.CurDAG->getDataLayout());
return Index;
+ }
case SelectionDAGISel::OPC_CheckTypeRes: {
unsigned Res = Table[Index++];
- Result = !::CheckType(Table, Index, N.getValue(Res), SDISel.TLI,
- SDISel.CurDAG->getDataLayout());
+ Result = !::CheckType((MVT::SimpleValueType)Table[Index++], N.getValue(Res),
+ SDISel.TLI, SDISel.CurDAG->getDataLayout());
return Index;
}
case SelectionDAGISel::OPC_CheckChild0Type:
@@ -2869,11 +2883,12 @@ static unsigned IsPredicateKnownToFail(const unsigned char *Table,
case SelectionDAGISel::OPC_CheckChild4Type:
case SelectionDAGISel::OPC_CheckChild5Type:
case SelectionDAGISel::OPC_CheckChild6Type:
- case SelectionDAGISel::OPC_CheckChild7Type:
- Result = !::CheckChildType(
- Table, Index, N, SDISel.TLI, SDISel.CurDAG->getDataLayout(),
- Table[Index - 1] - SelectionDAGISel::OPC_CheckChild0Type);
+ case SelectionDAGISel::OPC_CheckChild7Type: {
+ Result = !::CheckChildType((MVT::SimpleValueType)Table[Index++], N,
+ SDISel.TLI, SDISel.CurDAG->getDataLayout(),
+ Opcode - SelectionDAGISel::OPC_CheckChild0Type);
return Index;
+ }
case SelectionDAGISel::OPC_CheckCondCode:
Result = !::CheckCondCode(Table, Index, N);
return Index;
@@ -3302,15 +3317,28 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
continue;
case OPC_CheckType:
- if (!::CheckType(MatcherTable, MatcherIndex, N, TLI,
- CurDAG->getDataLayout()))
+ case OPC_CheckTypeI32:
+ case OPC_CheckTypeI64:
+ MVT::SimpleValueType VT;
+ switch (Opcode) {
+ case OPC_CheckTypeI32:
+ VT = MVT::i32;
+ break;
+ case OPC_CheckTypeI64:
+ VT = MVT::i64;
+ break;
+ default:
+ VT = (MVT::SimpleValueType)MatcherTable[MatcherIndex++];
+ break;
+ }
+ if (!::CheckType(VT, N, TLI, CurDAG->getDataLayout()))
break;
continue;
case OPC_CheckTypeRes: {
unsigned Res = MatcherTable[MatcherIndex++];
- if (!::CheckType(MatcherTable, MatcherIndex, N.getValue(Res), TLI,
- CurDAG->getDataLayout()))
+ if (!::CheckType((MVT::SimpleValueType)MatcherTable[MatcherIndex++],
+ N.getValue(Res), TLI, CurDAG->getDataLayout()))
break;
continue;
}
@@ -3382,8 +3410,8 @@ void SelectionDAGISel::SelectCodeCommon(SDNode *NodeToMatch,
case OPC_CheckChild2Type: case OPC_CheckChild3Type:
case OPC_CheckChild4Type: case OPC_CheckChild5Type:
case OPC_CheckChild6Type: case OPC_CheckChild7Type:
- if (!::CheckChildType(MatcherTable, MatcherIndex, N, TLI,
- CurDAG->getDataLayout(),
+ if (!::CheckChildType((MVT::SimpleValueType)MatcherTable[MatcherIndex++],
+ N, TLI, CurDAG->getDataLayout(),
Opcode - OPC_CheckChild0Type))
break;
continue;
diff --git a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
index 4a11991036efc11..24d95e743703423 100644
--- a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
@@ -578,9 +578,16 @@ EmitMatcher(const Matcher *N, const unsigned Indent, unsigned CurrentIdx,
case Matcher::CheckType:
if (cast<CheckTypeMatcher>(N)->getResNo() == 0) {
- OS << "OPC_CheckType, "
- << getEnumName(cast<CheckTypeMatcher>(N)->getType()) << ",\n";
- return 2;
+ MVT::SimpleValueType VT = cast<CheckTypeMatcher>(N)->getType();
+ switch (VT) {
+ case MVT::i32:
+ case MVT::i64:
+ OS << "OPC_CheckTypeI" << MVT(VT).getScalarSizeInBits() << ",\n";
+ return 1;
+ default:
+ OS << "OPC_CheckType, " << getEnumName(VT) << ",\n";
+ return 2;
+ }
}
OS << "OPC_CheckTypeRes, " << cast<CheckTypeMatcher>(N)->getResNo()
<< ", " << getEnumName(cast<CheckTypeMatcher>(N)->getType()) << ",\n";
``````````
</details>
https://github.com/llvm/llvm-project/pull/73281
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