[llvm] [PowerPC] Spill non-volatile registers required for traceback table (PR #71115)

[Lei Huang via llvm-commits]

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@@ -1,15 +1,16 @@
-# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -x mir -mcpu=pwr8 -mattr=-altivec \
-# RUN: -run-pass=prologepilog --verify-machineinstrs < %s | \
-# RUN: FileCheck %s --check-prefixes=CHECK,SAVEONE
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -mcpu=pwr8 -mattr=-altivec \
+# RUN: -run-pass=prologepilog --verify-machineinstrs %s -o - | \
+# RUN: FileCheck %s --check-prefixes=SAVEONE
 
-# RUN: llc -mtriple powerpc64-unknown-linux-gnu -x mir -mcpu=pwr7 -mattr=-altivec \
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lei137 wrote:

why is the mir test removed?

https://github.com/llvm/llvm-project/pull/71115