[llvm] [PowerPC] Spill non-volatile registers required for traceback table (PR #71115)

[Lei Huang via llvm-commits]

================
@@ -2741,6 +2743,66 @@ bool PPCFrameLowering::enableShrinkWrapping(const MachineFunction &MF) const {
   return !MF.getSubtarget<PPCSubtarget>().is32BitELFABI();
 }
 
+static bool isGPR(MCPhysReg Reg) { return Reg >= PPC::R0 && Reg <= PPC::R31; }
+static bool isG8R(MCPhysReg Reg) { return Reg >= PPC::X0 && Reg <= PPC::X31; }
+static bool isFPR(MCPhysReg Reg) { return Reg >= PPC::F0 && Reg <= PPC::F31; }
+static bool isVR(MCPhysReg Reg) { return Reg >= PPC::V0 && Reg <= PPC::V31; }
+
+void PPCFrameLowering::updateCalleeSaves(const MachineFunction &MF,
+                                         BitVector &SavedRegs) const {
+  // The AIX ABI uses traceback tables for EH which require that if callee-saved
+  // register N is used, all registers N-31 must be saved/restored.
+  // NOTE: The check for AIX is not actually what is relevant. Traceback tables
+  // on Linux have the same requirements. It is just that AIX is the only ABI
+  // for which we actually use traceback tables. If another ABI needs to be
+  // supported that also uses them, we can add a check such as
+  // Subtarget.usesTraceBackTables().
+  assert(Subtarget.isAIXABI() && "function only called for AIX");
+
+  // If there are no callee saves then there is nothing to do.
+  if (SavedRegs.none())
+    return;
+
+  const PPCRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
----------------
lei137 wrote:

In most other passes I see:
```
 const TargetRegisterInfo *TRI = &TII->getRegisterInfo();
```
What is the difference between `PPCRegisterInfo` vs `TRI`?  I would think it's the same.. and if so it would be good if we can just follow that convention.

https://github.com/llvm/llvm-project/pull/71115