[llvm] b71b32b - [Gisel][AArch64] legalize G_IS_FPCLASS (#72796)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 23 01:31:09 PST 2023
Author: Thorsten Schütt
Date: 2023-11-23T10:31:05+01:00
New Revision: b71b32ba872fed4cb5a7da1ef539ebbecbbe0809
URL: https://github.com/llvm/llvm-project/commit/b71b32ba872fed4cb5a7da1ef539ebbecbbe0809
DIFF: https://github.com/llvm/llvm-project/commit/b71b32ba872fed4cb5a7da1ef539ebbecbbe0809.diff
LOG: [Gisel][AArch64] legalize G_IS_FPCLASS (#72796)
Added:
llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-class.mir
Modified:
llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 000fd648595222b..316a9eaa63d4bb4 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -1117,6 +1117,8 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
getActionDefinitionsBuilder({G_GET_FPMODE, G_SET_FPMODE, G_RESET_FPMODE})
.libcall();
+ getActionDefinitionsBuilder(G_IS_FPCLASS).lower();
+
getLegacyLegalizerInfo().computeTables();
verify(*ST.getInstrInfo());
}
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-class.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-class.mir
new file mode 100644
index 000000000000000..bd9dc83fae59fb3
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp-class.mir
@@ -0,0 +1,86 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
+# RUN: llc -mtriple=aarch64 -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s
+
+---
+name: isnan_32
+liveins:
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: isnan_32
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 2139095040
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[AND]](s32), [[C1]]
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C2]], [[ICMP]]
+ ; CHECK-NEXT: $w0 = COPY [[OR]](s32)
+ %0:_(s32) = COPY $w0
+ %1:_(s1) = nofpexcept G_IS_FPCLASS %0(s32), 3
+ %2:_(s32) = G_ANYEXT %1(s1)
+ $w0 = COPY %2(s32)
+...
+---
+name: isnormal_32
+liveins:
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: isnormal_32
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8388608
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[AND]], [[C1]]
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2130706432
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[SUB]](s32), [[C2]]
+ ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C3]], [[ICMP]]
+ ; CHECK-NEXT: $w0 = COPY [[OR]](s32)
+ %0:_(s32) = COPY $w0
+ %1:_(s1) = nofpexcept G_IS_FPCLASS %0(s32), 264
+ %2:_(s32) = G_ANYEXT %1(s1)
+ $w0 = COPY %2(s32)
+...
+---
+name: iszero_32
+liveins:
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: iszero_32
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2147483647
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[AND]](s32), [[C1]]
+ ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[ICMP]]
+ ; CHECK-NEXT: $w0 = COPY [[OR]](s32)
+ %0:_(s32) = COPY $w0
+ %1:_(s1) = nofpexcept G_IS_FPCLASS %0(s32), 96
+ %2:_(s32) = G_ANYEXT %1(s1)
+ $w0 = COPY %2(s32)
+...
+---
+name: iszero_64
+liveins:
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: iszero_64
+ ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 9223372036854775807
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY1]], [[C]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[AND]](s64), [[C1]]
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[C2]], [[ICMP]]
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[OR]](s32)
+ ; CHECK-NEXT: $x0 = COPY [[ANYEXT]](s64)
+ %0:_(s64) = COPY $x0
+ %1:_(s1) = nofpexcept G_IS_FPCLASS %0(s64), 96
+ %2:_(s64) = G_ANYEXT %1(s1)
+ $x0 = COPY %2(s64)
+...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
index 4fa6cd087988128..6996416a8243009 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
@@ -524,8 +524,8 @@
# DEBUG-NEXT: .. the first uncovered type index: 2, OK
# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
# DEBUG-NEXT: G_IS_FPCLASS (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
-# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
+# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_FCANONICALIZE (opcode {{[0-9]+}}): 1 type index, 0 imm indices
# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
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