[llvm] [RISCV][GISEL] lowerFormalArguments for variadic arguments (PR #73064)

via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 22 12:13:14 PST 2023


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git-clang-format --diff 1822bc15cb378458e942e405ae7da32ee75b8c5b f8a1224125cca80386fa18e0c16908f05b5b5254 -- llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp llvm/lib/Target/RISCV/GISel/RISCVCallLowering.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp b/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
index de2a4f4652..2367712925 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
@@ -423,10 +423,9 @@ bool RISCVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder,
   return true;
 }
 
-static const MCPhysReg ArgGPRs[] = {
-  RISCV::X10, RISCV::X11, RISCV::X12, RISCV::X13,
-  RISCV::X14, RISCV::X15, RISCV::X16, RISCV::X17
-};
+static const MCPhysReg ArgGPRs[] = {RISCV::X10, RISCV::X11, RISCV::X12,
+                                    RISCV::X13, RISCV::X14, RISCV::X15,
+                                    RISCV::X16, RISCV::X17};
 
 /// If there are varargs that were passed in a0-a7, the data in those registers
 /// must be copied to the varargs save area on the stack.

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https://github.com/llvm/llvm-project/pull/73064


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