[llvm] [AMDGPU] Folding imm offset in more cases for scratch access (PR #70634)

[Nicolai Hähnle via llvm-commits]

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@@ -1146,13 +1146,57 @@ bool AMDGPUDAGToDAGISel::isDSOffset2Legal(SDValue Base, unsigned Offset0,
   return CurDAG->SignBitIsZero(Base);
 }
 
-bool AMDGPUDAGToDAGISel::isFlatScratchBaseLegal(SDValue Base,
-                                                uint64_t FlatVariant) const {
+// Whether we can infer the operands are non-negative if the result is
+// non-negative.
+static bool canInferNonNegativeOperands(SDValue Addr) {
+  return (Addr.getOpcode() == ISD::ADD &&
+          Addr->getFlags().hasNoUnsignedWrap()) ||
+         Addr->getOpcode() == ISD::OR;
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nhaehnle wrote:

This should be okay. If we get an OR here, it means that the OR can be equivalently replaced by an ADD. And in that case, there cannot be an unsigned wrap.

In fact, the function name feels misleading. Shouldn't it rather be `canInferNoUnsignedWrap`?

https://github.com/llvm/llvm-project/pull/70634