[llvm] [RISCV] Add macro fusions for Xiangshan (PR #72362)

[Yinan Xu via llvm-commits]

poemonsense wrote:

> cc @dtcxzyw @poemonsense Can you address @topperc's comments? It seems that some fusions don't match instruction patterns LLVM generated. Is it because you are using GCC when profiling? It seems that some ISel patterns need to be changed to support these fusions.

Yes, I can confirm that we were using GCC in 2021 to decide these fusions (and thus Nanhu implements them). If they will not be emitted by LLVM, I think it makes sense to remove them in LLVM? 

I was planning to try LLVM to test the fusions and instruction latency hints this week. But I still did not get enough time to do this. Sorry for that.

https://github.com/llvm/llvm-project/pull/72362