[llvm] [PowerPC] Do not generate `isel` instruction if target doesn't have this instruction (PR #72845)

[Qiu Chaofan via llvm-commits]

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@@ -12715,7 +12717,9 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
     DebugLoc dl = MI.getDebugLoc();
     TII->insertSelect(*BB, MI, dl, MI.getOperand(0).getReg(), Cond,
                       MI.getOperand(2).getReg(), MI.getOperand(3).getReg());
-  } else if (MI.getOpcode() == PPC::SELECT_CC_F4 ||
+  } else if (MI.getOpcode() == PPC::SELECT_CC_I4 ||
+             MI.getOpcode() == PPC::SELECT_CC_I8 ||
+             MI.getOpcode() == PPC::SELECT_CC_F4 ||
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ecnelises wrote:

We can't guarantee partial order of these generated opcodes. But since in code below there's another `...MI.getOpcode() == PPC::SELECT_I4...` (11 comparisons), can we wrap them into a predicate function?

https://github.com/llvm/llvm-project/pull/72845