[llvm] [X86][MC] Support encoding/decoding for JMPABS (PR #72835)

Shengchen Kan via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 20 18:10:48 PST 2023


================
@@ -354,7 +363,8 @@ class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins,
   string EVEX2VEXOverride = ?;
 
   bit notEVEX2VEXConvertible = 0; // Prevent EVEX->VEX conversion.
-  bit ExplicitVEXPrefix = 0; // Force the instruction to use VEX encoding.
+  ExplicitOpPrefix explicitOpPrefix = NoExplicitOpPrefix;
+  bits<2> explicitOpPrefixBits = explicitOpPrefix.Value;
----------------
KanRobert wrote:

We need `bits<2>` member b/c in X86RecognizableInstr.cpp, `byteFromRec` requires the `bits` format.

We need `ExplicitOpPrefix` member b/c `explicitOpPrefix = ExplicitVEX` in X86InstrSSE.td.

Similarly, we have both
```
  OperandSize OpSize = OpSizeFixed; // Does this instruction's encoding change
                                    // based on operand size of the mode?
  bits<2> OpSizeBits = OpSize.Value;
  AddressSize AdSize = AdSizeX; // Does this instruction's encoding change
                                // based on address size of the mode?
  bits<2> AdSizeBits = AdSize.Value;
```
in this file.


https://github.com/llvm/llvm-project/pull/72835


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