[llvm] 23e1b61 - [X86] Regenerate constant-pool-sharing.ll with AVX test coverage

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-11-20T15:24:38Z
New Revision: 23e1b6159ea1a327fa8ee1fbaec5c503bdcdd518

URL: https://github.com/llvm/llvm-project/commit/23e1b6159ea1a327fa8ee1fbaec5c503bdcdd518
DIFF: https://github.com/llvm/llvm-project/commit/23e1b6159ea1a327fa8ee1fbaec5c503bdcdd518.diff

LOG: [X86] Regenerate constant-pool-sharing.ll with AVX test coverage

Shows failure to share the constant pool load (broadcast) on AVX targets

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/constant-pool-sharing.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/constant-pool-sharing.ll b/llvm/test/CodeGen/X86/constant-pool-sharing.ll
index 338da14b2a5b287..8c358ba40a5b991 100644
--- a/llvm/test/CodeGen/X86/constant-pool-sharing.ll
+++ b/llvm/test/CodeGen/X86/constant-pool-sharing.ll
@@ -1,15 +1,67 @@
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 | FileCheck %s --check-prefix=COMMON --check-prefix=LINUX
-; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=corei7 | FileCheck %s --check-prefix=COMMON --check-prefix=MSVC
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 | FileCheck %s --check-prefixes=SSE-LINUX
+; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=corei7 | FileCheck %s --check-prefixes=SSE-MSVC
+; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7-avx | FileCheck %s --check-prefixes=AVX-LINUX
+; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=corei7-avx | FileCheck %s --check-prefixes=AVX-MSVC
 
 ; llc should share constant pool entries between this integer vector
 ; and this floating-point vector since they have the same encoding.
+; FIXME: AVX is duplicating broadcasts
 
-; LINUX:   LCPI0_0(%rip), %xmm0
-; MSVC:    __xmm at 40000000400000004000000040000000(%rip), %xmm0
-; COMMON:  movaps        %xmm0, ({{%rdi|%rcx}})
-; COMMON:  movaps        %xmm0, ({{%rsi|%rdx}})
-
-define void @foo(ptr %p, ptr %q, i1 %t) nounwind {
+define void @share_v4i32_v4f32(ptr %p, ptr %q, i1 %t) nounwind {
+; SSE-LINUX-LABEL: share_v4i32_v4f32:
+; SSE-LINUX:       # %bb.0: # %entry
+; SSE-LINUX-NEXT:    movaps {{.*#+}} xmm0 = [1073741824,1073741824,1073741824,1073741824]
+; SSE-LINUX-NEXT:    .p2align 4, 0x90
+; SSE-LINUX-NEXT:  .LBB0_1: # %loop
+; SSE-LINUX-NEXT:    # =>This Inner Loop Header: Depth=1
+; SSE-LINUX-NEXT:    movaps %xmm0, (%rdi)
+; SSE-LINUX-NEXT:    movaps %xmm0, (%rsi)
+; SSE-LINUX-NEXT:    testb $1, %dl
+; SSE-LINUX-NEXT:    jne .LBB0_1
+; SSE-LINUX-NEXT:  # %bb.2: # %ret
+; SSE-LINUX-NEXT:    retq
+;
+; SSE-MSVC-LABEL: share_v4i32_v4f32:
+; SSE-MSVC:       # %bb.0: # %entry
+; SSE-MSVC-NEXT:    movaps {{.*#+}} xmm0 = [1073741824,1073741824,1073741824,1073741824]
+; SSE-MSVC-NEXT:    .p2align 4, 0x90
+; SSE-MSVC-NEXT:  .LBB0_1: # %loop
+; SSE-MSVC-NEXT:    # =>This Inner Loop Header: Depth=1
+; SSE-MSVC-NEXT:    movaps %xmm0, (%rcx)
+; SSE-MSVC-NEXT:    movaps %xmm0, (%rdx)
+; SSE-MSVC-NEXT:    testb $1, %r8b
+; SSE-MSVC-NEXT:    jne .LBB0_1
+; SSE-MSVC-NEXT:  # %bb.2: # %ret
+; SSE-MSVC-NEXT:    retq
+;
+; AVX-LINUX-LABEL: share_v4i32_v4f32:
+; AVX-LINUX:       # %bb.0: # %entry
+; AVX-LINUX-NEXT:    vbroadcastss {{.*#+}} xmm0 = [1073741824,1073741824,1073741824,1073741824]
+; AVX-LINUX-NEXT:    vbroadcastss {{.*#+}} xmm1 = [1073741824,1073741824,1073741824,1073741824]
+; AVX-LINUX-NEXT:    .p2align 4, 0x90
+; AVX-LINUX-NEXT:  .LBB0_1: # %loop
+; AVX-LINUX-NEXT:    # =>This Inner Loop Header: Depth=1
+; AVX-LINUX-NEXT:    vmovaps %xmm0, (%rdi)
+; AVX-LINUX-NEXT:    vmovaps %xmm1, (%rsi)
+; AVX-LINUX-NEXT:    testb $1, %dl
+; AVX-LINUX-NEXT:    jne .LBB0_1
+; AVX-LINUX-NEXT:  # %bb.2: # %ret
+; AVX-LINUX-NEXT:    retq
+;
+; AVX-MSVC-LABEL: share_v4i32_v4f32:
+; AVX-MSVC:       # %bb.0: # %entry
+; AVX-MSVC-NEXT:    vbroadcastss {{.*#+}} xmm0 = [1073741824,1073741824,1073741824,1073741824]
+; AVX-MSVC-NEXT:    vbroadcastss {{.*#+}} xmm1 = [1073741824,1073741824,1073741824,1073741824]
+; AVX-MSVC-NEXT:    .p2align 4, 0x90
+; AVX-MSVC-NEXT:  .LBB0_1: # %loop
+; AVX-MSVC-NEXT:    # =>This Inner Loop Header: Depth=1
+; AVX-MSVC-NEXT:    vmovaps %xmm0, (%rcx)
+; AVX-MSVC-NEXT:    vmovaps %xmm1, (%rdx)
+; AVX-MSVC-NEXT:    testb $1, %r8b
+; AVX-MSVC-NEXT:    jne .LBB0_1
+; AVX-MSVC-NEXT:  # %bb.2: # %ret
+; AVX-MSVC-NEXT:    retq
 entry:
   br label %loop
 loop: