[llvm] [MC][Aarch32][Assembly] Emit relocs for LDRs (PR #72873)

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git-clang-format --diff c4c52d4199e13125fd9560f9f3b2d8a6bf2582f2 75b68be59b490747bfdf2b0fbb681ca3b38aacea -- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp llvm/lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
index 7a307bfdd1..ca3b77e4a3 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
@@ -76,7 +76,8 @@ const MCFixupKindInfo &ARMAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
       // Name                      Offset (bits) Size (bits)     Flags
       {"fixup_arm_ldst_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"fixup_t2_ldst_pcrel_12", 0, 32,
-       MCFixupKindInfo::FKF_IsPCRel | MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
+       MCFixupKindInfo::FKF_IsPCRel |
+           MCFixupKindInfo::FKF_IsAlignedDownTo32Bits},
       {"fixup_arm_pcrel_10_unscaled", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
       {"fixup_arm_pcrel_10", 0, 32, IsPCRelConstant},
       {"fixup_t2_pcrel_10", 0, 32,

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https://github.com/llvm/llvm-project/pull/72873