[llvm] [RFC] implement convergence control in MIR using SelectionDAG (PR #71785)

[Sameer Sahasrabuddhe via llvm-commits]

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@@ -901,6 +901,20 @@ bool AMDGPUTargetLowering::aggressivelyPreferBuildVectorSources(EVT VecVT) const
   return true;
 }
 
+void AMDGPUTargetLowering::CollectTargetIntrinsicOperands(
+    const CallInst &I, SmallVectorImpl<SDValue> &Ops, SelectionDAG &DAG,
+    function_ref<SDValue(const Value *)> getValue) const {
+  if (auto Bundle = I.getOperandBundle(LLVMContext::OB_convergencectrl)) {
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ssahasra wrote:

The new SDNode being returned has the AMD-specific GLUE opcode. It's not clear to me that we can decide for all targets whether the LLVM convergence operand bundle should be translated to a glued operand. So this allows each target to return whatever node fits their scheme.

https://github.com/llvm/llvm-project/pull/71785