[llvm] 5923864 - [PowerPC] Precommit test to show codegen while `isel` is unavailable. NFC.
Kai Luo via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 19 23:29:35 PST 2023
Author: Kai Luo
Date: 2023-11-20T07:28:21Z
New Revision: 592386400d515cdd043fe787e702fe96d150986a
URL: https://github.com/llvm/llvm-project/commit/592386400d515cdd043fe787e702fe96d150986a
DIFF: https://github.com/llvm/llvm-project/commit/592386400d515cdd043fe787e702fe96d150986a.diff
LOG: [PowerPC] Precommit test to show codegen while `isel` is unavailable. NFC.
Added:
llvm/test/CodeGen/PowerPC/select-cc-no-isel.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/PowerPC/select-cc-no-isel.ll b/llvm/test/CodeGen/PowerPC/select-cc-no-isel.ll
new file mode 100644
index 000000000000000..345f3804c0c4934
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/select-cc-no-isel.ll
@@ -0,0 +1,46 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -verify-machineinstrs -simplify-mir -mtriple=powerpc64-ibm-aix \
+; RUN: -mcpu=pwr7 -stop-after=finalize-isel %s -o - | FileCheck %s
+; RUN: llc -verify-machineinstrs -simplify-mir -mtriple=powerpc-ibm-aix \
+; RUN: -mcpu=pwr7 -stop-after=finalize-isel %s -o - | FileCheck --check-prefix=CHECK-32 %s
+
+define signext i32 @foo(ptr nocapture noundef %dummy) #0 {
+ ; CHECK-LABEL: name: foo
+ ; CHECK: bb.0.entry:
+ ; CHECK-NEXT: liveins: $x3
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x3
+ ; CHECK-NEXT: [[LWZ:%[0-9]+]]:gprc_and_gprc_nor0 = LWZ 0, [[COPY]] :: (load (s32) from %ir.dummy)
+ ; CHECK-NEXT: [[ADDI:%[0-9]+]]:gprc_and_gprc_nor0 = nsw ADDI [[LWZ]], 1
+ ; CHECK-NEXT: [[CMPWI:%[0-9]+]]:crrc = CMPWI [[LWZ]], 750
+ ; CHECK-NEXT: [[LI:%[0-9]+]]:gprc_and_gprc_nor0 = LI 1
+ ; CHECK-NEXT: [[ISEL:%[0-9]+]]:gprc = ISEL [[ADDI]], [[LI]], [[CMPWI]].sub_lt
+ ; CHECK-NEXT: STW killed [[ISEL]], 0, [[COPY]] :: (store (s32) into %ir.dummy)
+ ; CHECK-NEXT: [[LI8_:%[0-9]+]]:g8rc = LI8 0
+ ; CHECK-NEXT: $x3 = COPY [[LI8_]]
+ ; CHECK-NEXT: BLR8 implicit $lr8, implicit $rm, implicit $x3
+ ;
+ ; CHECK-32-LABEL: name: foo
+ ; CHECK-32: bb.0.entry:
+ ; CHECK-32-NEXT: liveins: $r3
+ ; CHECK-32-NEXT: {{ $}}
+ ; CHECK-32-NEXT: [[COPY:%[0-9]+]]:gprc_and_gprc_nor0 = COPY $r3
+ ; CHECK-32-NEXT: [[LWZ:%[0-9]+]]:gprc_and_gprc_nor0 = LWZ 0, [[COPY]] :: (load (s32) from %ir.dummy)
+ ; CHECK-32-NEXT: [[ADDI:%[0-9]+]]:gprc_and_gprc_nor0 = nsw ADDI [[LWZ]], 1
+ ; CHECK-32-NEXT: [[CMPWI:%[0-9]+]]:crrc = CMPWI [[LWZ]], 750
+ ; CHECK-32-NEXT: [[LI:%[0-9]+]]:gprc_and_gprc_nor0 = LI 1
+ ; CHECK-32-NEXT: [[ISEL:%[0-9]+]]:gprc = ISEL [[ADDI]], [[LI]], [[CMPWI]].sub_lt
+ ; CHECK-32-NEXT: STW killed [[ISEL]], 0, [[COPY]] :: (store (s32) into %ir.dummy)
+ ; CHECK-32-NEXT: [[LI1:%[0-9]+]]:gprc = LI 0
+ ; CHECK-32-NEXT: $r3 = COPY [[LI1]]
+ ; CHECK-32-NEXT: BLR implicit $lr, implicit $rm, implicit $r3
+entry:
+ %0 = load i32, ptr %dummy, align 4
+ %cmp = icmp slt i32 %0, 750
+ %inc = add nsw i32 %0, 1
+ %storemerge = select i1 %cmp, i32 %inc, i32 1
+ store i32 %storemerge, ptr %dummy, align 4
+ ret i32 0
+}
+
+attributes #0 = { "target-features"="-isel" }
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