[llvm] Fold (a % b) lt/ge (b-1) where b is a power of 2 (PR #72504)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 19 01:20:01 PST 2023
https://github.com/elhewaty updated https://github.com/llvm/llvm-project/pull/72504
>From e5e9bad3c410a10bad81b9ff1df8314ab30122a6 Mon Sep 17 00:00:00 2001
From: Mohamed Atef <mohamedatef1698 at gmail.com>
Date: Fri, 17 Nov 2023 16:20:59 +0200
Subject: [PATCH 1/2] [InstCombine] Add test coverage for (a % b) lt/ge (b-1)
where b is non-negative
---
llvm/test/Transforms/InstCombine/icmp.ll | 208 +++++++++++++++++++++++
1 file changed, 208 insertions(+)
diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll
index 78ac730cf026ed9..bd411d82b2a89a2 100644
--- a/llvm/test/Transforms/InstCombine/icmp.ll
+++ b/llvm/test/Transforms/InstCombine/icmp.ll
@@ -10,6 +10,214 @@ declare void @use_i8(i8)
declare void @use_i32(i32)
declare void @use_i64(i64)
+; tests for (x % y) >=/ < (y - 1)
+define i1 @srem_sge_test1(i64 %x, i64 %C) {
+; CHECK-LABEL: @srem_sge_test1(
+; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i64 [[C:%.*]], -1
+; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
+; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i64 [[C]], -1
+; CHECK-NEXT: [[Y:%.*]] = srem i64 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i64 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %precond = icmp sge i64 %C, 0
+ call void @llvm.assume(i1 %precond)
+ %Cminus1 = add i64 %C, -1
+ %y = srem i64 %x, %C
+ %cmp = icmp sge i64 %y, %Cminus1
+ ret i1 %cmp
+}
+
+define i1 @srem_slt_test1(i64 %x, i64 %C) {
+; CHECK-LABEL: @srem_slt_test1(
+; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i64 [[C:%.*]], -1
+; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
+; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i64 [[C]], -1
+; CHECK-NEXT: [[Y:%.*]] = srem i64 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %precond = icmp sge i64 %C, 0
+ call void @llvm.assume(i1 %precond)
+ %Cminus1 = add i64 %C, -1
+ %y = srem i64 %x, %C
+ %cmp = icmp slt i64 %y, %Cminus1
+ ret i1 %cmp
+}
+
+define i1 @srem_sge_test2(i32 %x, i32 %C) {
+; CHECK-LABEL: @srem_sge_test2(
+; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i32 [[C:%.*]], -1
+; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
+; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i32 [[C]], -1
+; CHECK-NEXT: [[Y:%.*]] = srem i32 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %precond = icmp sge i32 %C, 0
+ call void @llvm.assume(i1 %precond)
+ %Cminus1 = add i32 %C, -1
+ %y = srem i32 %x, %C
+ %cmp = icmp sge i32 %y, %Cminus1
+ ret i1 %cmp
+}
+
+define i1 @srem_slt_test2(i32 %x, i32 %C) {
+; CHECK-LABEL: @srem_slt_test2(
+; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i32 [[C:%.*]], -1
+; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
+; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i32 [[C]], -1
+; CHECK-NEXT: [[Y:%.*]] = srem i32 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %precond = icmp sge i32 %C, 0
+ call void @llvm.assume(i1 %precond)
+ %Cminus1 = add i32 %C, -1
+ %y = srem i32 %x, %C
+ %cmp = icmp slt i32 %y, %Cminus1
+ ret i1 %cmp
+}
+
+define i1 @srem_sge_test3(i16 %x, i16 %C) {
+; CHECK-LABEL: @srem_sge_test3(
+; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i16 [[C:%.*]], -1
+; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
+; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i16 [[C]], -1
+; CHECK-NEXT: [[Y:%.*]] = srem i16 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i16 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %precond = icmp sge i16 %C, 0
+ call void @llvm.assume(i1 %precond)
+ %Cminus1 = add i16 %C, -1
+ %y = srem i16 %x, %C
+ %cmp = icmp sge i16 %y, %Cminus1
+ ret i1 %cmp
+}
+
+define i1 @srem_slt_test3(i16 %x, i16 %C) {
+; CHECK-LABEL: @srem_slt_test3(
+; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i16 [[C:%.*]], -1
+; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
+; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i16 [[C]], -1
+; CHECK-NEXT: [[Y:%.*]] = srem i16 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %precond = icmp sge i16 %C, 0
+ call void @llvm.assume(i1 %precond)
+ %Cminus1 = add i16 %C, -1
+ %y = srem i16 %x, %C
+ %cmp = icmp slt i16 %y, %Cminus1
+ ret i1 %cmp
+}
+
+define i1 @srem_sge_test4(i8 %x, i8 %C) {
+; CHECK-LABEL: @srem_sge_test4(
+; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i8 [[C:%.*]], -1
+; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
+; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i8 [[C]], -1
+; CHECK-NEXT: [[Y:%.*]] = srem i8 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i8 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %precond = icmp sge i8 %C, 0
+ call void @llvm.assume(i1 %precond)
+ %Cminus1 = add i8 %C, -1
+ %y = srem i8 %x, %C
+ %cmp = icmp sge i8 %y, %Cminus1
+ ret i1 %cmp
+}
+
+define i1 @srem_slt_test4(i8 %x, i8 %C) {
+; CHECK-LABEL: @srem_slt_test4(
+; CHECK-NEXT: [[PRECOND:%.*]] = icmp sgt i8 [[C:%.*]], -1
+; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
+; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i8 [[C]], -1
+; CHECK-NEXT: [[Y:%.*]] = srem i8 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %precond = icmp sge i8 %C, 0
+ call void @llvm.assume(i1 %precond)
+ %Cminus1 = add i8 %C, -1
+ %y = srem i8 %x, %C
+ %cmp = icmp slt i8 %y, %Cminus1
+ ret i1 %cmp
+}
+
+; negative tests
+define i1 @srem_slt_neg_test(i8 %x, i8 %C) {
+; CHECK-LABEL: @srem_slt_neg_test(
+; CHECK-NEXT: [[CMINUS1:%.*]] = add i8 [[C:%.*]], -1
+; CHECK-NEXT: [[Y:%.*]] = srem i8 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %Cminus1 = add i8 %C, -1
+ %y = srem i8 %x, %C
+ %cmp = icmp slt i8 %y, %Cminus1
+ ret i1 %cmp
+}
+
+define i1 @test_srem_slt_constant(i32 %a) {
+; CHECK-LABEL: @test_srem_slt_constant(
+; CHECK-NEXT: [[Y:%.*]] = srem i32 [[A:%.*]], 512
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[Y]], 511
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %y = srem i32 %a, 512
+ %cmp = icmp slt i32 %y, 511
+ ret i1 %cmp
+}
+
+define i1 @test_srem_sge_constant(i32 %a) {
+; CHECK-LABEL: @test_srem_sge_constant(
+; CHECK-NEXT: [[Y:%.*]] = srem i32 [[A:%.*]], 512
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[Y]], 510
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %y = srem i32 %a, 512
+ %cmp = icmp sge i32 %y, 511
+ ret i1 %cmp
+}
+
+define <2 x i1> @test_srem_slt_constant_splat(<2 x i32> %a) {
+; CHECK-LABEL: @test_srem_slt_constant_splat(
+; CHECK-NEXT: [[Y:%.*]] = srem <2 x i32> [[A:%.*]], <i32 512, i32 512>
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[Y]], <i32 511, i32 511>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
+;
+ %y = srem <2 x i32> %a, <i32 512, i32 512>
+ %cmp = icmp slt <2 x i32> %y, <i32 511, i32 511>
+ ret <2 x i1> %cmp
+}
+
+define <2 x i1> @test_srem_sge_constant_splat(<2 x i32> %a) {
+; CHECK-LABEL: @test_srem_sge_constant_splat(
+; CHECK-NEXT: [[Y:%.*]] = srem <2 x i32> [[A:%.*]], <i32 512, i32 512>
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[Y]], <i32 510, i32 510>
+; CHECK-NEXT: ret <2 x i1> [[CMP]]
+;
+ %y = srem <2 x i32> %a, <i32 512, i32 512>
+ %cmp = icmp sge <2 x i32> %y, <i32 511, i32 511>
+ ret <2 x i1> %cmp
+}
+
+define i1 @srem_sge_neg_test(i8 %x, i8 %C) {
+; CHECK-LABEL: @srem_sge_neg_test(
+; CHECK-NEXT: [[CMINUS1:%.*]] = add i8 [[C:%.*]], -1
+; CHECK-NEXT: [[Y:%.*]] = srem i8 [[X:%.*]], [[C]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i8 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: ret i1 [[CMP]]
+;
+ %Cminus1 = add i8 %C, -1
+ %y = srem i8 %x, %C
+ %cmp = icmp sge i8 %y, %Cminus1
+ ret i1 %cmp
+}
+
define i32 @test1(i32 %X) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 [[X:%.*]], 31
>From a9347038d559194f2cfed7f6eeae2fea22e63f0e Mon Sep 17 00:00:00 2001
From: Mohamed Atef <mohamedatef1698 at gmail.com>
Date: Sun, 19 Nov 2023 11:17:21 +0200
Subject: [PATCH 2/2] [InstCombine] Fold (a % b) lt/ge (b-1) where b is
non-negative.
---
.../InstCombine/InstCombineCompares.cpp | 19 +++++++++++
llvm/test/Transforms/InstCombine/icmp.ll | 32 +++++++++----------
2 files changed, 35 insertions(+), 16 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 9bc84c7dd6e1539..ac170165c5dde1b 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -6837,6 +6837,25 @@ Instruction *InstCombinerImpl::visitICmpInst(ICmpInst &I) {
Changed = true;
}
+ {
+ Value *X, *Y;
+ const APInt *C;
+ ICmpInst::Predicate Pred = I.getPredicate();
+ if ((Pred == ICmpInst::ICMP_SGE || Pred == ICmpInst::ICMP_SLT) &&
+ match(Op0, m_OneUse(m_SRem(m_Value(X), m_Value(Y)))) &&
+ ((match(Op1, m_OneUse(m_c_Add(m_Deferred(Y), m_AllOnes()))) &&
+ isKnownNonNegative(Y, DL, 0, Q.AC, Q.CxtI, Q.DT)) ||
+ (match(Y, m_APInt(C)) && C->isNonNegative() &&
+ match(Op1, m_SpecificInt(*C - 1))))) {
+ // icmp slt (X % C), (C - 1) --> icmp ne (X % C), (C - 1)
+ // icmp sge (X % C), (C - 1) --> icmp eq (X % C), (C - 1)
+ auto *NewCmp = Builder.CreateICmp(
+ Pred == ICmpInst::ICMP_SLT ? ICmpInst::ICMP_NE : ICmpInst::ICMP_EQ,
+ Op0, Op1);
+ return replaceInstUsesWith(I, NewCmp);
+ }
+ }
+
if (Value *V = simplifyICmpInst(I.getPredicate(), Op0, Op1, Q))
return replaceInstUsesWith(I, V);
diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll
index bd411d82b2a89a2..f59f7fe660be11c 100644
--- a/llvm/test/Transforms/InstCombine/icmp.ll
+++ b/llvm/test/Transforms/InstCombine/icmp.ll
@@ -17,7 +17,7 @@ define i1 @srem_sge_test1(i64 %x, i64 %C) {
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i64 [[C]], -1
; CHECK-NEXT: [[Y:%.*]] = srem i64 [[X:%.*]], [[C]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i64 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[Y]], [[CMINUS1]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%precond = icmp sge i64 %C, 0
@@ -34,7 +34,7 @@ define i1 @srem_slt_test1(i64 %x, i64 %C) {
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i64 [[C]], -1
; CHECK-NEXT: [[Y:%.*]] = srem i64 [[X:%.*]], [[C]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[Y]], [[CMINUS1]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%precond = icmp sge i64 %C, 0
@@ -51,7 +51,7 @@ define i1 @srem_sge_test2(i32 %x, i32 %C) {
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i32 [[C]], -1
; CHECK-NEXT: [[Y:%.*]] = srem i32 [[X:%.*]], [[C]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[Y]], [[CMINUS1]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%precond = icmp sge i32 %C, 0
@@ -68,7 +68,7 @@ define i1 @srem_slt_test2(i32 %x, i32 %C) {
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i32 [[C]], -1
; CHECK-NEXT: [[Y:%.*]] = srem i32 [[X:%.*]], [[C]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[Y]], [[CMINUS1]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%precond = icmp sge i32 %C, 0
@@ -85,7 +85,7 @@ define i1 @srem_sge_test3(i16 %x, i16 %C) {
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i16 [[C]], -1
; CHECK-NEXT: [[Y:%.*]] = srem i16 [[X:%.*]], [[C]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i16 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[Y]], [[CMINUS1]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%precond = icmp sge i16 %C, 0
@@ -102,7 +102,7 @@ define i1 @srem_slt_test3(i16 %x, i16 %C) {
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i16 [[C]], -1
; CHECK-NEXT: [[Y:%.*]] = srem i16 [[X:%.*]], [[C]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i16 [[Y]], [[CMINUS1]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%precond = icmp sge i16 %C, 0
@@ -119,7 +119,7 @@ define i1 @srem_sge_test4(i8 %x, i8 %C) {
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i8 [[C]], -1
; CHECK-NEXT: [[Y:%.*]] = srem i8 [[X:%.*]], [[C]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp sge i8 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[Y]], [[CMINUS1]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%precond = icmp sge i8 %C, 0
@@ -136,7 +136,7 @@ define i1 @srem_slt_test4(i8 %x, i8 %C) {
; CHECK-NEXT: call void @llvm.assume(i1 [[PRECOND]])
; CHECK-NEXT: [[CMINUS1:%.*]] = add nsw i8 [[C]], -1
; CHECK-NEXT: [[Y:%.*]] = srem i8 [[X:%.*]], [[C]]
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[Y]], [[CMINUS1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[Y]], [[CMINUS1]]
; CHECK-NEXT: ret i1 [[CMP]]
;
%precond = icmp sge i8 %C, 0
@@ -163,8 +163,8 @@ define i1 @srem_slt_neg_test(i8 %x, i8 %C) {
define i1 @test_srem_slt_constant(i32 %a) {
; CHECK-LABEL: @test_srem_slt_constant(
-; CHECK-NEXT: [[Y:%.*]] = srem i32 [[A:%.*]], 512
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[Y]], 511
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2147483137
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 511
; CHECK-NEXT: ret i1 [[CMP]]
;
%y = srem i32 %a, 512
@@ -174,8 +174,8 @@ define i1 @test_srem_slt_constant(i32 %a) {
define i1 @test_srem_sge_constant(i32 %a) {
; CHECK-LABEL: @test_srem_sge_constant(
-; CHECK-NEXT: [[Y:%.*]] = srem i32 [[A:%.*]], 512
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[Y]], 510
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2147483137
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 511
; CHECK-NEXT: ret i1 [[CMP]]
;
%y = srem i32 %a, 512
@@ -185,8 +185,8 @@ define i1 @test_srem_sge_constant(i32 %a) {
define <2 x i1> @test_srem_slt_constant_splat(<2 x i32> %a) {
; CHECK-LABEL: @test_srem_slt_constant_splat(
-; CHECK-NEXT: [[Y:%.*]] = srem <2 x i32> [[A:%.*]], <i32 512, i32 512>
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[Y]], <i32 511, i32 511>
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], <i32 -2147483137, i32 -2147483137>
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[TMP1]], <i32 511, i32 511>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%y = srem <2 x i32> %a, <i32 512, i32 512>
@@ -196,8 +196,8 @@ define <2 x i1> @test_srem_slt_constant_splat(<2 x i32> %a) {
define <2 x i1> @test_srem_sge_constant_splat(<2 x i32> %a) {
; CHECK-LABEL: @test_srem_sge_constant_splat(
-; CHECK-NEXT: [[Y:%.*]] = srem <2 x i32> [[A:%.*]], <i32 512, i32 512>
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[Y]], <i32 510, i32 510>
+; CHECK-NEXT: [[TMP1:%.*]] = and <2 x i32> [[A:%.*]], <i32 -2147483137, i32 -2147483137>
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[TMP1]], <i32 511, i32 511>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
%y = srem <2 x i32> %a, <i32 512, i32 512>
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