[llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)

[Matt Arsenault via llvm-commits]

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@@ -852,12 +852,22 @@ void SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
     }
 
     if (!AMDGPU::SReg_32RegClass.contains(SrcReg)) {
+      // When calling convention allocates SGPR for i1 argument, we may
+      // have a SRPR_64 to SReg_32 copy for an outgoing i1 argument. Adjust
+      // the copy to avoid illegal copy.
+      if (AMDGPU::SGPR_64RegClass.contains(SrcReg)) {
+        auto sub0 = RI.getSubReg(SrcReg, AMDGPU::sub0);
+        if (sub0 != DestReg)
+          BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DestReg).addReg(sub0);
+        return;
+      }
+
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arsenm wrote:

This is just broken, you shouldn't have to touch any MIR code. Such a copy should fail the verifier 

https://github.com/llvm/llvm-project/pull/72461