[llvm] [AMDGPU] Folding imm offset in more cases for scratch access (PR #70634)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 16 18:02:33 PST 2023


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@@ -1146,13 +1146,57 @@ bool AMDGPUDAGToDAGISel::isDSOffset2Legal(SDValue Base, unsigned Offset0,
   return CurDAG->SignBitIsZero(Base);
 }
 
-bool AMDGPUDAGToDAGISel::isFlatScratchBaseLegal(SDValue Base,
-                                                uint64_t FlatVariant) const {
+// Whether we can infer the operands are non-negative if the result is
+// non-negative.
+static bool canInferNonNegativeOperands(SDValue Addr) {
+  return (Addr.getOpcode() == ISD::ADD &&
+          Addr->getFlags().hasNoUnsignedWrap()) ||
+         Addr->getOpcode() == ISD::OR;
----------------
arsenm wrote:

The or case is a little weird, I guess it assumes the base address of any valid target cannot be negative but I suppose that's fine 

https://github.com/llvm/llvm-project/pull/70634


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