[llvm] [lld] [llvm][lld] Support R_<CLS>_GOTREL32 (PR #72584)
via llvm-commits
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Thu Nov 16 15:19:38 PST 2023
https://github.com/PiJoules created https://github.com/llvm/llvm-project/pull/72584
This is the follopw implementation to
https://github.com/ARM-software/abi-aa/pull/223 that supports this relocation in llvm and lld.
>From a0b6255fef55971275350107d2b39440f2b0245b Mon Sep 17 00:00:00 2001
From: Leonard Chan <leonardchan at google.com>
Date: Wed, 15 Nov 2023 23:48:40 +0000
Subject: [PATCH] [llvm][lld] Support R_<CLS>_GOTREL32
This is the follopw implementation to
https://github.com/ARM-software/abi-aa/pull/223 that supports this
relocation in llvm and lld.
---
lld/ELF/Arch/AArch64.cpp | 3 ++
lld/test/ELF/aarch64-reloc-gotpcrel32.s | 36 +++++++++++++++++++
.../llvm/BinaryFormat/ELFRelocs/AArch64.def | 2 ++
.../MCTargetDesc/AArch64ELFObjectWriter.cpp | 7 ++--
llvm/test/MC/AArch64/elf-reloc-gotpcrel32.s | 14 ++++++++
5 files changed, 60 insertions(+), 2 deletions(-)
create mode 100644 lld/test/ELF/aarch64-reloc-gotpcrel32.s
create mode 100644 llvm/test/MC/AArch64/elf-reloc-gotpcrel32.s
diff --git a/lld/ELF/Arch/AArch64.cpp b/lld/ELF/Arch/AArch64.cpp
index 048f0ec30ebd283..32cff73955028e4 100644
--- a/lld/ELF/Arch/AArch64.cpp
+++ b/lld/ELF/Arch/AArch64.cpp
@@ -165,6 +165,8 @@ RelExpr AArch64::getRelExpr(RelType type, const Symbol &s,
case R_AARCH64_ADR_GOT_PAGE:
case R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21:
return R_AARCH64_GOT_PAGE_PC;
+ case R_AARCH64_GOTPCREL32:
+ return R_GOT_PC;
case R_AARCH64_NONE:
return R_NONE;
default:
@@ -374,6 +376,7 @@ void AArch64::relocate(uint8_t *loc, const Relocation &rel,
write32(loc, val);
break;
case R_AARCH64_PLT32:
+ case R_AARCH64_GOTPCREL32:
checkInt(loc, val, 32, rel);
write32(loc, val);
break;
diff --git a/lld/test/ELF/aarch64-reloc-gotpcrel32.s b/lld/test/ELF/aarch64-reloc-gotpcrel32.s
new file mode 100644
index 000000000000000..7ea55bfc5b00aad
--- /dev/null
+++ b/lld/test/ELF/aarch64-reloc-gotpcrel32.s
@@ -0,0 +1,36 @@
+// REQUIRES: aarch64
+// RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t.o
+// RUN: llvm-mc -filetype=obj -triple=aarch64 %S/Inputs/abs255.s -o %t255.o
+// RUN: ld.lld %t.o -o %t.so -shared
+// RUN: llvm-readobj -S %t.so | FileCheck --check-prefix=SEC %s
+// RUN: llvm-objdump --no-print-imm-hex -s -d %t.so | FileCheck %s
+
+
+// SEC: Name: .got (58)
+// SEC-NEXT: Type: SHT_PROGBITS (0x1)
+// SEC-NEXT: Flags [ (0x3)
+// SEC-NEXT: SHF_ALLOC (0x2)
+// SEC-NEXT: SHF_WRITE (0x1)
+// SEC-NEXT: ]
+// SEC-NEXT: Address: 0x20350
+// SEC-NEXT: Offset: 0x350
+// SEC-NEXT: Size: 8
+// SEC-NEXT: Link: 0
+// SEC-NEXT: Info: 0
+// SEC-NEXT: AddressAlignment: 8
+// SEC-NEXT: EntrySize: 0
+
+ .section .data
+ .globl bar
+bar:
+
+ .globl _start
+_start:
+// bar at GOTPCREL = 0x20350 (got entry for `bar`) - 0x30358 (.) = 0xfffefff8
+// bar at GOTPCREL+4 = 0x20350 (got entry for `bar`) - 0x3035c (.) + 4 = 0xfffefff8
+// bar at GOTPCREL-4 = 0x20350 (got entry for `bar`) - 0x30360 (.) + 4 = 0xfffeffec
+// CHECK: Contents of section .data:
+// CHECK: 30358 f8fffeff f8fffeff ecfffeff
+ .word bar at GOTPCREL
+ .word bar at GOTPCREL+4
+ .word bar at GOTPCREL-4
diff --git a/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def b/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
index b507109b19e1b90..fcaea2aceed5209 100644
--- a/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
+++ b/llvm/include/llvm/BinaryFormat/ELFRelocs/AArch64.def
@@ -59,6 +59,7 @@ ELF_RELOC(R_AARCH64_ADR_GOT_PAGE, 0x137)
ELF_RELOC(R_AARCH64_LD64_GOT_LO12_NC, 0x138)
ELF_RELOC(R_AARCH64_LD64_GOTPAGE_LO15, 0x139)
ELF_RELOC(R_AARCH64_PLT32, 0x13a)
+ELF_RELOC(R_AARCH64_GOTPCREL32, 0x13b)
ELF_RELOC(R_AARCH64_TLSGD_ADR_PREL21, 0x200)
ELF_RELOC(R_AARCH64_TLSGD_ADR_PAGE21, 0x201)
ELF_RELOC(R_AARCH64_TLSGD_ADD_LO12_NC, 0x202)
@@ -166,6 +167,7 @@ ELF_RELOC(R_AARCH64_P32_ADR_GOT_PAGE, 0x01a)
ELF_RELOC(R_AARCH64_P32_LD32_GOT_LO12_NC, 0x01b)
ELF_RELOC(R_AARCH64_P32_LD32_GOTPAGE_LO14, 0x01c)
ELF_RELOC(R_AARCH64_P32_PLT32, 0x01d)
+ELF_RELOC(R_AARCH64_P32_GOTPCREL32, 0x01e)
ELF_RELOC(R_AARCH64_P32_TLSGD_ADR_PREL21, 0x050)
ELF_RELOC(R_AARCH64_P32_TLSGD_ADR_PAGE21, 0x051)
ELF_RELOC(R_AARCH64_P32_TLSGD_ADD_LO12_NC, 0x052)
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
index 9de40661298ccad..996fd1614d19f57 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
@@ -120,7 +120,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
assert((!Target.getSymA() ||
Target.getSymA()->getKind() == MCSymbolRefExpr::VK_None ||
- Target.getSymA()->getKind() == MCSymbolRefExpr::VK_PLT) &&
+ Target.getSymA()->getKind() == MCSymbolRefExpr::VK_PLT ||
+ Target.getSymA()->getKind() == MCSymbolRefExpr::VK_GOTPCREL) &&
"Should only be expression-level modifiers here");
assert((!Target.getSymB() ||
@@ -202,7 +203,9 @@ unsigned AArch64ELFObjectWriter::getRelocType(MCContext &Ctx,
case FK_Data_2:
return R_CLS(ABS16);
case FK_Data_4:
- return R_CLS(ABS32);
+ return Target.getAccessVariant() == MCSymbolRefExpr::VK_GOTPCREL
+ ? R_CLS(GOTPCREL32)
+ : R_CLS(ABS32);
case FK_Data_8:
if (IsILP32) {
Ctx.reportError(Fixup.getLoc(),
diff --git a/llvm/test/MC/AArch64/elf-reloc-gotpcrel32.s b/llvm/test/MC/AArch64/elf-reloc-gotpcrel32.s
new file mode 100644
index 000000000000000..afbcaad9e1dfdcc
--- /dev/null
+++ b/llvm/test/MC/AArch64/elf-reloc-gotpcrel32.s
@@ -0,0 +1,14 @@
+// RUN: llvm-mc -triple=aarch64 -filetype=obj %s -o - | \
+// RUN: llvm-readobj -r - | FileCheck %s
+
+ .section .data
+this:
+ .word this at GOTPCREL
+ .word extern_sym at GOTPCREL+4
+ .word negative_offset at GOTPCREL-4
+
+// CHECK: Section ({{.*}}) .rela.data
+// CHECK-NEXT: 0x0 R_AARCH64_GOTPCREL32 this 0x0
+// CHECK-NEXT: 0x4 R_AARCH64_GOTPCREL32 extern_sym 0x4
+// CHECK-NEXT: 0x8 R_AARCH64_GOTPCREL32 negative_offset 0xFFFFFFFFFFFFFFFC
+// CHECK-NEXT: }
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