[llvm] c3b9c36 - [SCCP] Propagate exact flags (#72432)

[via llvm-commits]

Author: Yingwei Zheng
Date: 2023-11-16T14:05:28+08:00
New Revision: c3b9c36f3ab4d9021951a00c9a6798e3fe0a48a5

URL: https://github.com/llvm/llvm-project/commit/c3b9c36f3ab4d9021951a00c9a6798e3fe0a48a5
DIFF: https://github.com/llvm/llvm-project/commit/c3b9c36f3ab4d9021951a00c9a6798e3fe0a48a5.diff

LOG: [SCCP] Propagate exact flags (#72432)

This patch propagates exact flags for `ashr->lshr` and `sdiv->udiv` in
SCCP.

This missed optimization is discovered with the help of
https://github.com/AliveToolkit/alive2/pull/962.

Added: 
    llvm/test/Transforms/SCCP/exact-flags.ll

Modified: 
    llvm/lib/Transforms/Utils/SCCPSolver.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Utils/SCCPSolver.cpp b/llvm/lib/Transforms/Utils/SCCPSolver.cpp
index dac10c2a8baf9e1..ab95698abc4399d 100644
--- a/llvm/lib/Transforms/Utils/SCCPSolver.cpp
+++ b/llvm/lib/Transforms/Utils/SCCPSolver.cpp
@@ -187,6 +187,7 @@ static bool replaceSignedInst(SCCPSolver &Solver,
     if (InsertedValues.count(Op0) || !isNonNegative(Op0))
       return false;
     NewInst = BinaryOperator::CreateLShr(Op0, Inst.getOperand(1), "", &Inst);
+    NewInst->setIsExact(Inst.isExact());
     break;
   }
   case Instruction::SDiv:
@@ -199,6 +200,8 @@ static bool replaceSignedInst(SCCPSolver &Solver,
     auto NewOpcode = Inst.getOpcode() == Instruction::SDiv ? Instruction::UDiv
                                                            : Instruction::URem;
     NewInst = BinaryOperator::Create(NewOpcode, Op0, Op1, "", &Inst);
+    if (Inst.getOpcode() == Instruction::SDiv)
+      NewInst->setIsExact(Inst.isExact());
     break;
   }
   default:

diff  --git a/llvm/test/Transforms/SCCP/exact-flags.ll b/llvm/test/Transforms/SCCP/exact-flags.ll
new file mode 100644
index 000000000000000..a5e3bf111bbd9da
--- /dev/null
+++ b/llvm/test/Transforms/SCCP/exact-flags.ll
@@ -0,0 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
+; RUN: opt -passes=sccp < %s -S | FileCheck %s
+
+define i8 @ashr_to_lshr(i8 %x, i8 %y) {
+; CHECK-LABEL: define i8 @ashr_to_lshr(
+; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) {
+; CHECK-NEXT:    [[P:%.*]] = and i8 [[X]], 127
+; CHECK-NEXT:    [[R:%.*]] = lshr exact i8 [[P]], [[Y]]
+; CHECK-NEXT:    ret i8 [[R]]
+;
+  %p = and i8 %x, 127
+  %r = ashr exact i8 %p, %y
+  ret i8 %r
+}
+
+define i8 @sdiv_to_udiv(i8 %x, i8 %y) {
+; CHECK-LABEL: define i8 @sdiv_to_udiv(
+; CHECK-SAME: i8 [[X:%.*]], i8 [[Y:%.*]]) {
+; CHECK-NEXT:    [[X1:%.*]] = and i8 [[X]], 127
+; CHECK-NEXT:    [[Y1:%.*]] = and i8 [[Y]], 127
+; CHECK-NEXT:    [[R:%.*]] = udiv exact i8 [[X1]], [[Y1]]
+; CHECK-NEXT:    ret i8 [[R]]
+;
+  %x1 = and i8 %x, 127
+  %y1 = and i8 %y, 127
+  %r = sdiv exact i8 %x1, %y1
+  ret i8 %r
+}