[llvm] [RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (PR #71501)
Philip Reames via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 14 09:47:09 PST 2023
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@@ -534,7 +534,7 @@ define void @masked_load_v2i32_align1(ptr %a, <2 x i32> %m, ptr %res_ptr) nounwi
; RV64-SLOW: # %bb.0:
; RV64-SLOW-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
; RV64-SLOW-NEXT: vmseq.vi v8, v8, 0
-; RV64-SLOW-NEXT: vsetvli zero, zero, e8, mf8, ta, ma
+; RV64-SLOW-NEXT: vsetivli zero, 1, e8, m1, ta, ma
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preames wrote:
This looks like a missing vsetvli insertion optimization.
https://github.com/llvm/llvm-project/pull/71501
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