[llvm] [RISCV][GlobalISel] Legalize G_ADD, G_SUB, G_AND, G_OR, G_XOR on RISC-V Vector Extension (PR #71400)

Michael Maitland via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 14 07:14:07 PST 2023


================
@@ -44,10 +45,50 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
   const LLT s32 = LLT::scalar(32);
   const LLT s64 = LLT::scalar(64);
 
+  const LLT nxv1s8 = LLT::scalable_vector(1, s8);
+  const LLT nxv2s8 = LLT::scalable_vector(2, s8);
+  const LLT nxv4s8 = LLT::scalable_vector(4, s8);
+  const LLT nxv8s8 = LLT::scalable_vector(8, s8);
+  const LLT nxv16s8 = LLT::scalable_vector(16, s8);
+  const LLT nxv32s8 = LLT::scalable_vector(32, s8);
+  const LLT nxv64s8 = LLT::scalable_vector(64, s8);
+
+  const LLT nxv1s16 = LLT::scalable_vector(1, s16);
+  const LLT nxv2s16 = LLT::scalable_vector(2, s16);
+  const LLT nxv4s16 = LLT::scalable_vector(4, s16);
+  const LLT nxv8s16 = LLT::scalable_vector(8, s16);
+  const LLT nxv16s16 = LLT::scalable_vector(16, s16);
+  const LLT nxv32s16 = LLT::scalable_vector(32, s16);
+
+  const LLT nxv1s32 = LLT::scalable_vector(1, s32);
+  const LLT nxv2s32 = LLT::scalable_vector(2, s32);
+  const LLT nxv4s32 = LLT::scalable_vector(4, s32);
+  const LLT nxv8s32 = LLT::scalable_vector(8, s32);
+  const LLT nxv16s32 = LLT::scalable_vector(16, s32);
+
+  const LLT nxv1s64 = LLT::scalable_vector(1, s64);
+  const LLT nxv2s64 = LLT::scalable_vector(2, s64);
+  const LLT nxv4s64 = LLT::scalable_vector(4, s64);
+  const LLT nxv8s64 = LLT::scalable_vector(8, s64);
+
   using namespace TargetOpcode;
 
   getActionDefinitionsBuilder({G_ADD, G_SUB, G_AND, G_OR, G_XOR})
       .legalFor({s32, sXLen})
+      .legalFor(ST.hasVInstructions()
+                    ? std::initializer_list<LLT>{nxv2s8, nxv4s8, nxv8s8,
+                                                 nxv16s8, nxv32s8, nxv64s8,
+                                                 nxv2s16, nxv4s16, nxv8s16,
+                                                 nxv16s16, nxv32s16, nxv2s32,
+                                                 nxv4s32, nxv8s32, nxv16s32}
+                    : std::initializer_list<LLT>())
+      .legalFor(
+          ST.hasVInstructionsI64()
+              ? std::initializer_list<LLT>{nxv1s64, nxv2s64, nxv4s64, nxv8s64}
+              : std::initializer_list<LLT>())
+      .legalFor(ST.getELen() == 64
----------------
michaelmaitland wrote:

I think you are right. Ignore what I said here. 

https://github.com/llvm/llvm-project/pull/71400


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