[llvm] [RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (PR #71501)

[Luke Lau via llvm-commits]

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@@ -7405,7 +7405,7 @@ define <8 x half> @mgather_baseidx_v8i8_v8f16(ptr %base, <8 x i8> %idxs, <8 x i1
 ; RV64ZVE32F-NEXT:    slli a2, a2, 1
 ; RV64ZVE32F-NEXT:    add a2, a0, a2
 ; RV64ZVE32F-NEXT:    flh fa5, 0(a2)
-; RV64ZVE32F-NEXT:    vsetivli zero, 8, e16, mf2, tu, ma
+; RV64ZVE32F-NEXT:    vsetivli zero, 8, e16, m2, tu, ma
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lukel97 wrote:

My guess is that it tried to touch up the SEW/LMUL ratio so it's the same as bb.0. But I'm not sure why it wasn't able to emit the x0,x0 form here, it looks like it should be ok to use it.

https://github.com/llvm/llvm-project/pull/71501