[llvm] [RISCV] Remove vmv.s.x and vmv.x.s lmul pseudo variants (PR #71501)

[Luke Lau via llvm-commits]

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@@ -8,7 +8,7 @@
 define signext i8 @extractelt_nxv1i8_0(<vscale x 1 x i8> %v) {
 ; CHECK-LABEL: extractelt_nxv1i8_0:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vsetivli zero, 1, e8, mf8, ta, ma
+; CHECK-NEXT:    vsetivli zero, 1, e8, m1, ta, ma
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lukel97 wrote:

We already increase LMUL for vmv.s.x and vmv.x.s in RISCVInsertVSETVLI, albeit it to avoid a vsetvli. Perhaps that already sets a precedent.

https://github.com/llvm/llvm-project/pull/71501