[llvm] Hexagon: Add ic{kill,invidx,tag{r,w}}, rte insts (PR #72172)

via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 13 15:34:15 PST 2023


https://github.com/androm3da created https://github.com/llvm/llvm-project/pull/72172

These were unintentionally omitted from bd91cf8d83a9c352a02ea1b66095ef53362e027c

>From 20cecae90a74f3b23dd285f77ef1b54139474f9d Mon Sep 17 00:00:00 2001
From: Brian Cain <bcain at quicinc.com>
Date: Mon, 13 Nov 2023 14:55:21 -0800
Subject: [PATCH] Hexagon: Add ic{kill,invidx,tag{r,w}}, rte insts

These were unintentionally omitted from bd91cf8d83a9c352a02ea1b66095ef53362e027c
---
 .../lib/Target/Hexagon/HexagonDepIICScalar.td | 212 ++++++++++++++++++
 .../lib/Target/Hexagon/HexagonDepInstrInfo.td |  49 ++++
 llvm/test/MC/Hexagon/JUMPR_MISC_SYSTEM.s      |  26 +++
 3 files changed, 287 insertions(+)
 create mode 100644 llvm/test/MC/Hexagon/JUMPR_MISC_SYSTEM.s

diff --git a/llvm/lib/Target/Hexagon/HexagonDepIICScalar.td b/llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
index 3bd41767477b33f..8906e8a6fb97cbe 100644
--- a/llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
+++ b/llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
@@ -23,6 +23,7 @@ def tc_0fac1eb8 : InstrItinClass;
 def tc_112d30d6 : InstrItinClass;
 def tc_1242dc2a : InstrItinClass;
 def tc_1248597c : InstrItinClass;
+def tc_139ef484 : InstrItinClass;
 def tc_14ab4f41 : InstrItinClass;
 def tc_151bf368 : InstrItinClass;
 def tc_158aa3f7 : InstrItinClass;
@@ -109,6 +110,7 @@ def tc_713b66bf : InstrItinClass;
 def tc_7401744f : InstrItinClass;
 def tc_7476d766 : InstrItinClass;
 def tc_74a42bda : InstrItinClass;
+def tc_759e57be : InstrItinClass;
 def tc_76bb5435 : InstrItinClass;
 def tc_77f94a5e : InstrItinClass;
 def tc_788b1d09 : InstrItinClass;
@@ -117,6 +119,7 @@ def tc_7af3a37e : InstrItinClass;
 def tc_7b9187d3 : InstrItinClass;
 def tc_7c31e19a : InstrItinClass;
 def tc_7c6d32e4 : InstrItinClass;
+def tc_7d6a2568 : InstrItinClass;
 def tc_7dc63b5c : InstrItinClass;
 def tc_7f58404a : InstrItinClass;
 def tc_7f7f45f5 : InstrItinClass;
@@ -178,6 +181,7 @@ def tc_b3d46584 : InstrItinClass;
 def tc_b4dc7630 : InstrItinClass;
 def tc_b7c4062a : InstrItinClass;
 def tc_b837298f : InstrItinClass;
+def tc_b9bec29e : InstrItinClass;
 def tc_ba9255a6 : InstrItinClass;
 def tc_bb07f2c5 : InstrItinClass;
 def tc_bb78483e : InstrItinClass;
@@ -485,6 +489,10 @@ class DepScalarItinV55 {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_3stall*/
       [InstrStage<1, [SLOT0]>], [4, 3, 1],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -829,10 +837,18 @@ class DepScalarItinV55 {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0, SLOT1]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -1097,6 +1113,10 @@ class DepScalarItinV55 {
       [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0, SLOT1]>], [2, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -1337,6 +1357,10 @@ class DepScalarItinV60 {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0]>], [3, 3, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -1681,10 +1705,18 @@ class DepScalarItinV60 {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0, SLOT1]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -1949,6 +1981,10 @@ class DepScalarItinV60 {
       [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0, SLOT1]>], [2, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -2189,6 +2225,10 @@ class DepScalarItinV60se {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0], 0>,
        InstrStage<1, [CVI_ST]>], [3, 3, 2],
@@ -2552,10 +2592,18 @@ class DepScalarItinV60se {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0, SLOT1]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -2825,6 +2873,10 @@ class DepScalarItinV60se {
       [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0, SLOT1]>], [2, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -3077,6 +3129,10 @@ class DepScalarItinV62 {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0]>], [3, 3, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -3421,10 +3477,18 @@ class DepScalarItinV62 {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0, SLOT1]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -3689,6 +3753,10 @@ class DepScalarItinV62 {
       [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0, SLOT1]>], [2, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -3933,6 +4001,10 @@ class DepScalarItinV65 {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0]>], [3, 3, 1],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -4277,10 +4349,18 @@ class DepScalarItinV65 {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0, SLOT1]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -4553,6 +4633,10 @@ class DepScalarItinV65 {
       [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0, SLOT1]>], [2, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -4797,6 +4881,10 @@ class DepScalarItinV66 {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0]>], [3, 3, 1],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -5141,10 +5229,18 @@ class DepScalarItinV66 {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0, SLOT1]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -5417,6 +5513,10 @@ class DepScalarItinV66 {
       [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0, SLOT1]>], [2, 2, 3],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -5661,6 +5761,10 @@ class DepScalarItinV67 {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0]>], [3, 3, 1],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -6005,10 +6109,18 @@ class DepScalarItinV67 {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0, SLOT1]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -6285,6 +6397,10 @@ class DepScalarItinV67 {
       [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0, SLOT1]>], [2, 2, 3],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -6529,6 +6645,10 @@ class DepScalarItinV67T {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0]>], [3, 3, 1],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -6873,10 +6993,18 @@ class DepScalarItinV67T {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -7149,6 +7277,10 @@ class DepScalarItinV67T {
       [InstrStage<1, [SLOT0, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [2, 2, 3],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -7393,6 +7525,10 @@ class DepScalarItinV68 {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0]>], [3, 3, 1],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -7737,10 +7873,18 @@ class DepScalarItinV68 {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0, SLOT1]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -8013,6 +8157,10 @@ class DepScalarItinV68 {
       [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0, SLOT1]>], [2, 2, 3],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -8257,6 +8405,10 @@ class DepScalarItinV69 {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0]>], [3, 3, 1],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -8601,10 +8753,18 @@ class DepScalarItinV69 {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0, SLOT1]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -8877,6 +9037,10 @@ class DepScalarItinV69 {
       [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0, SLOT1]>], [2, 2, 3],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -9121,6 +9285,10 @@ class DepScalarItinV71 {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0]>], [3, 3, 1],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -9465,10 +9633,18 @@ class DepScalarItinV71 {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0, SLOT1]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -9741,6 +9917,10 @@ class DepScalarItinV71 {
       [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0, SLOT1]>], [2, 2, 3],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -9985,6 +10165,10 @@ class DepScalarItinV71T {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0]>], [3, 3, 1],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -10329,10 +10513,18 @@ class DepScalarItinV71T {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -10605,6 +10797,10 @@ class DepScalarItinV71T {
       [InstrStage<1, [SLOT0, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [2, 2, 3],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -10849,6 +11045,10 @@ class DepScalarItinV73 {
       [InstrStage<1, [SLOT3]>], [2, 2],
       [Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_139ef484, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_14ab4f41, /*tc_newvjump*/
       [InstrStage<1, [SLOT0]>], [3, 3, 1],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
@@ -11193,10 +11393,18 @@ class DepScalarItinV73 {
       [InstrStage<1, [SLOT0, SLOT1]>], [3, 1, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_759e57be, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [4, 1],
+      [Hex_FWD, Hex_FWD]>,
+
     InstrItinData <tc_76bb5435, /*tc_ld*/
       [InstrStage<1, [SLOT0, SLOT1]>], [4, 3, 2, 1, 2, 2],
       [Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD, Hex_FWD]>,
 
+    InstrItinData <tc_7d6a2568, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [1],
+      [Hex_FWD]>,
+
     InstrItinData <tc_77f94a5e, /*tc_st*/
       [InstrStage<1, [SLOT0]>], [],
       []>,
@@ -11469,6 +11677,10 @@ class DepScalarItinV73 {
       [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>], [],
       []>,
 
+    InstrItinData <tc_b9bec29e, /*tc_3stall*/
+      [InstrStage<1, [SLOT2]>], [],
+      []>,
+
     InstrItinData <tc_ba9255a6, /*tc_st*/
       [InstrStage<1, [SLOT0, SLOT1]>], [2, 2, 3],
       [Hex_FWD, Hex_FWD, Hex_FWD]>,
diff --git a/llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td b/llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
index e852ad12c5ca472..60c08581fdc669d 100644
--- a/llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
+++ b/llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
@@ -5825,6 +5825,16 @@ let isExtentSigned = 1;
 let opExtentBits = 9;
 let opExtentAlign = 2;
 }
+def J2_rte : HInst<
+(outs),
+(ins),
+"rte",
+tc_b9bec29e, TypeJ>, Enc_e3b0c4 {
+let Inst{13-0} = 0b00000000000000;
+let Inst{31-16} = 0b0101011111100000;
+let Uses = [ELR];
+let Defs = [PC];
+}
 def J2_trap0 : HInst<
 (outs),
 (ins u8_0Imm:$Ii),
@@ -40610,6 +40620,45 @@ let Inst{13-0} = 0b00000000000000;
 let Inst{31-21} = 0b01010110110;
 let isSolo = 1;
 }
+def Y2_icinvidx : HInst<
+(outs),
+(ins IntRegs:$Rs32),
+"icinvidx($Rs32)",
+tc_7d6a2568, TypeJ>, Enc_ecbcc8 {
+let Inst{13-0} = 0b00100000000000;
+let Inst{31-21} = 0b01010110110;
+let isSolo = 1;
+}
+def Y2_ickill : HInst<
+(outs),
+(ins),
+"ickill",
+tc_b9bec29e, TypeJ>, Enc_e3b0c4 {
+let Inst{13-0} = 0b01000000000000;
+let Inst{31-16} = 0b0101011011000000;
+let isSolo = 1;
+}
+def Y2_ictagr : HInst<
+(outs IntRegs:$Rd32),
+(ins IntRegs:$Rs32),
+"$Rd32 = ictagr($Rs32)",
+tc_759e57be, TypeJ>, Enc_5e2823 {
+let Inst{13-5} = 0b000000000;
+let Inst{31-21} = 0b01010101111;
+let hasNewValue = 1;
+let opNewValue = 0;
+let isSolo = 1;
+}
+def Y2_ictagw : HInst<
+(outs),
+(ins IntRegs:$Rs32, IntRegs:$Rt32),
+"ictagw($Rs32,$Rt32)",
+tc_139ef484, TypeJ>, Enc_ca3887 {
+let Inst{7-0} = 0b00000000;
+let Inst{13-13} = 0b0;
+let Inst{31-21} = 0b01010101110;
+let isSolo = 1;
+}
 def Y2_isync : HInst<
 (outs),
 (ins),
diff --git a/llvm/test/MC/Hexagon/JUMPR_MISC_SYSTEM.s b/llvm/test/MC/Hexagon/JUMPR_MISC_SYSTEM.s
new file mode 100644
index 000000000000000..ed4b3d420bb11af
--- /dev/null
+++ b/llvm/test/MC/Hexagon/JUMPR_MISC_SYSTEM.s
@@ -0,0 +1,26 @@
+# RUN: llvm-mc --triple=hexagon --mv73 -filetype=obj %s | \
+# RUN:    llvm-objdump --mcpu=hexagonv73 -d - | FileCheck %s
+                         hintjr(R31)
+# CHECK:      52bfc000 { hintjr(r31) }
+                         trap0(#0xff)
+# CHECK-NEXT: 5400df1c { trap0(#0xff) }
+                         trap1(#0xff)
+# CHECK-NEXT: 5480df1c { trap1(r0,#0xff) }
+                         pause(#0xff)
+# CHECK-NEXT: 5440df1c { pause(#0xff) }
+                         R31=icdatar(R31)
+# CHECK-NEXT: 55bfc01f { r31 = icdatar(r31) }
+                         R31=ictagr(R31)
+# CHECK-NEXT: 55ffc01f { r31 = ictagr(r31) }
+                         ictagw(R31,R31)
+# CHECK-NEXT: 55dfdf00 { ictagw(r31,r31) }
+                         icinva(R31)
+# CHECK-NEXT: 56dfc000 { icinva(r31) }
+                         icinvidx(R31)
+# CHECK-NEXT: 56dfc800 { icinvidx(r31) }
+                         ickill
+# CHECK-NEXT: 56c0d000 { ickill }
+                         isync
+# CHECK-NEXT: 57c0c002 { isync }
+                         rte
+# CHECK-NEXT: 57e0c000 { rte }



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