[llvm] [AMDGPU] RA inserted scalar instructions can be at the BB top (PR #72140)

[Stanislav Mekhanoshin via llvm-commits]

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@@ -846,8 +846,10 @@ class MachineBasicBlock
 
   /// Return the first instruction in MBB after I that is not a PHI, label or
   /// debug.  This is the correct point to insert copies at the beginning of a
-  /// basic block.
-  iterator SkipPHIsLabelsAndDebug(iterator I, bool SkipPseudoOp = true);
+  /// basic block. The optional arg \p Reg would allow targets to apply some
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rampitec wrote:

The description of Reg does not seem to describe anything. What is this register?

https://github.com/llvm/llvm-project/pull/72140