[llvm] [AMDGPU] RA inserted scalar instructions can be at the BB top (PR #72140)

[Stanislav Mekhanoshin via llvm-commits]

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@@ -1989,7 +1989,8 @@ class TargetInstrInfo : public MCInstrInfo {
   /// True if the instruction is bound to the top of its basic block and no
   /// other instructions shall be inserted before it. This can be implemented
   /// to prevent register allocator to insert spills before such instructions.
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rampitec wrote:

Reg needs to be described.

https://github.com/llvm/llvm-project/pull/72140