[llvm] [AMDGPU] Fix and use isSISrcInlinableOperand. NFC. (PR #72101)

via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 13 02:45:15 PST 2023


github-actions[bot] wrote:

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``````````bash
git-clang-format --diff a604c4b562e99470e397f050f1e8707f923ebed7 33c2805586664be193dfea79160ff12ee461bca8 -- llvm/lib/Target/AMDGPU/SIFoldOperands.cpp llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
index f3cd1b4348..a09abc639d 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -2241,8 +2241,8 @@ bool isSISrcInlinableOperand(const MCInstrDesc &Desc, unsigned OpNo) {
   unsigned OpType = Desc.operands()[OpNo].OperandType;
   return (OpType >= AMDGPU::OPERAND_REG_INLINE_C_FIRST &&
           OpType <= AMDGPU::OPERAND_REG_INLINE_C_LAST) ||
-      (OpType >= AMDGPU::OPERAND_REG_INLINE_AC_FIRST &&
-       OpType <= AMDGPU::OPERAND_REG_INLINE_AC_LAST);
+         (OpType >= AMDGPU::OPERAND_REG_INLINE_AC_FIRST &&
+          OpType <= AMDGPU::OPERAND_REG_INLINE_AC_LAST);
 }
 
 // Avoid using MCRegisterClass::getSize, since that function will go away

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https://github.com/llvm/llvm-project/pull/72101


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