[llvm] [RFC] implement convergence control in MIR using SelectionDAG (PR #71785)

[Matt Arsenault via llvm-commits]

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@@ -2610,7 +2610,17 @@ void AMDGPUDAGToDAGISel::SelectINTRINSIC_W_CHAIN(SDNode *N) {
 
 void AMDGPUDAGToDAGISel::SelectINTRINSIC_WO_CHAIN(SDNode *N) {
   unsigned IntrID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
-  unsigned Opcode;
+  unsigned Opcode = 0;
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arsenm wrote:

technically 0 is a valid opcode, should use INSTRUCTION_LIST_END

https://github.com/llvm/llvm-project/pull/71785