[llvm] [RFC] implement convergence control in MIR using SelectionDAG (PR #71785)

[Matt Arsenault via llvm-commits]

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@@ -2627,7 +2637,7 @@ void AMDGPUDAGToDAGISel::SelectINTRINSIC_WO_CHAIN(SDNode *N) {
     break;
   case Intrinsic::amdgcn_interp_p1_f16:
     SelectInterpP1F16(N);
-    return;
+    break;
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arsenm wrote:

This isn't convergent so I don't see why this would need to change 

https://github.com/llvm/llvm-project/pull/71785