[llvm] [X86][MC] Support encoding of EGPR for APX (PR #71909)

[Shengchen Kan via llvm-commits]

================
@@ -0,0 +1,240 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-56: error:
+# ERROR-NOT: error:
+## R bit
+
+# CHECK: leal	(%rax), %r16d
+# CHECK: encoding: [0xd5,0x40,0x8d,0x00]
+         leal	(%rax), %r16d
+
+# CHECK: leal	(%rax), %r17d
+# CHECK: encoding: [0xd5,0x40,0x8d,0x08]
+         leal	(%rax), %r17d
+
+# CHECK: leal	(%rax), %r18d
+# CHECK: encoding: [0xd5,0x40,0x8d,0x10]
+         leal	(%rax), %r18d
+
+# CHECK: leal	(%rax), %r19d
+# CHECK: encoding: [0xd5,0x40,0x8d,0x18]
+         leal	(%rax), %r19d
+
+# CHECK: leal	(%rax), %r20d
+# CHECK: encoding: [0xd5,0x40,0x8d,0x20]
+         leal	(%rax), %r20d
+
+# CHECK: leal	(%rax), %r21d
+# CHECK: encoding: [0xd5,0x40,0x8d,0x28]
+         leal	(%rax), %r21d
+
+# CHECK: leal	(%rax), %r22d
+# CHECK: encoding: [0xd5,0x40,0x8d,0x30]
+         leal	(%rax), %r22d
+
+# CHECK: leal	(%rax), %r23d
+# CHECK: encoding: [0xd5,0x40,0x8d,0x38]
+         leal	(%rax), %r23d
+
+# CHECK: leal	(%rax), %r24d
+# CHECK: encoding: [0xd5,0x44,0x8d,0x00]
+         leal	(%rax), %r24d
+
+# CHECK: leal	(%rax), %r25d
+# CHECK: encoding: [0xd5,0x44,0x8d,0x08]
+         leal	(%rax), %r25d
+
+# CHECK: leal	(%rax), %r26d
+# CHECK: encoding: [0xd5,0x44,0x8d,0x10]
+         leal	(%rax), %r26d
+
+# CHECK: leal	(%rax), %r27d
+# CHECK: encoding: [0xd5,0x44,0x8d,0x18]
+         leal	(%rax), %r27d
+
+# CHECK: leal	(%rax), %r28d
+# CHECK: encoding: [0xd5,0x44,0x8d,0x20]
+         leal	(%rax), %r28d
+
+# CHECK: leal	(%rax), %r29d
+# CHECK: encoding: [0xd5,0x44,0x8d,0x28]
+         leal	(%rax), %r29d
+
+# CHECK: leal	(%rax), %r30d
+# CHECK: encoding: [0xd5,0x44,0x8d,0x30]
+         leal	(%rax), %r30d
+
+# CHECK: leal	(%rax), %r31d
+# CHECK: encoding: [0xd5,0x44,0x8d,0x38]
+         leal	(%rax), %r31d
+
+## X bit
+
+# CHECK: leal	(,%r16), %eax
+# CHECK: encoding: [0xd5,0x20,0x8d,0x04,0x05,0x00,0x00,0x00,0x00]
+         leal	(,%r16), %eax
+
+# CHECK: leal	(,%r17), %eax
+# CHECK: encoding: [0xd5,0x20,0x8d,0x04,0x0d,0x00,0x00,0x00,0x00]
+         leal	(,%r17), %eax
+
+# CHECK: leal	(,%r18), %eax
+# CHECK: encoding: [0xd5,0x20,0x8d,0x04,0x15,0x00,0x00,0x00,0x00]
+         leal	(,%r18), %eax
+
+# CHECK: leal	(,%r19), %eax
+# CHECK: encoding: [0xd5,0x20,0x8d,0x04,0x1d,0x00,0x00,0x00,0x00]
+         leal	(,%r19), %eax
+
+# CHECK: leal	(,%r20), %eax
+# CHECK: encoding: [0xd5,0x20,0x8d,0x04,0x25,0x00,0x00,0x00,0x00]
+         leal	(,%r20), %eax
+
+# CHECK: leal	(,%r21), %eax
+# CHECK: encoding: [0xd5,0x20,0x8d,0x04,0x2d,0x00,0x00,0x00,0x00]
+         leal	(,%r21), %eax
+
+# CHECK: leal	(,%r22), %eax
+# CHECK: encoding: [0xd5,0x20,0x8d,0x04,0x35,0x00,0x00,0x00,0x00]
+         leal	(,%r22), %eax
+
+# CHECK: leal	(,%r23), %eax
+# CHECK: encoding: [0xd5,0x20,0x8d,0x04,0x3d,0x00,0x00,0x00,0x00]
+         leal	(,%r23), %eax
+
+# CHECK: leal	(,%r24), %eax
+# CHECK: encoding: [0xd5,0x22,0x8d,0x04,0x05,0x00,0x00,0x00,0x00]
+         leal	(,%r24), %eax
+
+# CHECK: leal	(,%r25), %eax
+# CHECK: encoding: [0xd5,0x22,0x8d,0x04,0x0d,0x00,0x00,0x00,0x00]
+         leal	(,%r25), %eax
+
+# CHECK: leal	(,%r26), %eax
+# CHECK: encoding: [0xd5,0x22,0x8d,0x04,0x15,0x00,0x00,0x00,0x00]
+         leal	(,%r26), %eax
+
+# CHECK: leal	(,%r27), %eax
+# CHECK: encoding: [0xd5,0x22,0x8d,0x04,0x1d,0x00,0x00,0x00,0x00]
+         leal	(,%r27), %eax
+
+# CHECK: leal	(,%r28), %eax
+# CHECK: encoding: [0xd5,0x22,0x8d,0x04,0x25,0x00,0x00,0x00,0x00]
+         leal	(,%r28), %eax
+
+# CHECK: leal	(,%r29), %eax
+# CHECK: encoding: [0xd5,0x22,0x8d,0x04,0x2d,0x00,0x00,0x00,0x00]
+         leal	(,%r29), %eax
+
+# CHECK: leal	(,%r30), %eax
+# CHECK: encoding: [0xd5,0x22,0x8d,0x04,0x35,0x00,0x00,0x00,0x00]
+         leal	(,%r30), %eax
+
+# CHECK: leal	(,%r31), %eax
+# CHECK: encoding: [0xd5,0x22,0x8d,0x04,0x3d,0x00,0x00,0x00,0x00]
----------------
KanRobert wrote:

Usually, we don't need to check the displacement b/c we only add new registers.

The instructions with displacement is to check the logic at X86MCCodeEmitter.cpp:774

```
   // Otherwise, if the displacement fits in a byte, encode as [REG+disp8].
    // Including a compressed disp8 for EVEX instructions that support it.
    // This also handles the 0 displacement for [EBP], [R13], [R21] or [R29]. We
    // can't use disp8 if the {disp32} pseudo prefix is present.
```
is also valid for EGPR.

https://github.com/llvm/llvm-project/pull/71909