[llvm] [RISCV][GISEL] Legalize G_JUMP_TABLE and G_BRJT (PR #71951)
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 10 07:47:36 PST 2023
https://github.com/michaelmaitland created https://github.com/llvm/llvm-project/pull/71951
None
>From 1a040be973152239c951e2533f2673aa3a6fe2e3 Mon Sep 17 00:00:00 2001
From: Michael Maitland <michaeltmaitland at gmail.com>
Date: Fri, 10 Nov 2023 07:43:49 -0800
Subject: [PATCH] [RISCV][GISEL] Legalize G_JUMP_TABLE and G_BRJT
---
.../Target/RISCV/GISel/RISCVLegalizerInfo.cpp | 6 ++
.../legalizer/rv32/legalize-brjt.mir | 38 +++++++++
.../legalizer/rv32/legalize-jumptable.mir | 31 ++++++++
.../legalizer/rv64/legalize-brjt.mir | 78 +++++++++++++++++++
.../legalizer/rv64/legalize-jumptable.mir | 31 ++++++++
5 files changed, 184 insertions(+)
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-brjt.mir
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-jumptable.mir
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-brjt.mir
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-jumptable.mir
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index 1aba6b78d8a9d9b..674dc9f33a1b5a2 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -252,6 +252,12 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
getActionDefinitionsBuilder({G_FCEIL, G_FFLOOR})
.libcallFor({s32, s64});
+ getActionDefinitionsBuilder(G_JUMP_TABLE).legalFor({p0});
+
+ getActionDefinitionsBuilder(G_BRJT).legalIf([=](const LegalityQuery &Query) {
+ return Query.Types[0] == p0 && typeInSet(1, {s32, sXLen});
+ });
+
getLegacyLegalizerInfo().computeTables();
}
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-brjt.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-brjt.mir
new file mode 100644
index 000000000000000..a249cd9b1ea229c
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-brjt.mir
@@ -0,0 +1,38 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - | FileCheck %s
+
+---
+name: test_brjt_s32
+jumpTable:
+ kind: block-address
+ entries:
+ - id: 0
+ blocks: [ '%bb.1', '%bb.2' ]
+
+body: |
+ ; CHECK-LABEL: name: test_brjt
+ ; CHECK: bb.0.entry:
+ ; CHECK-NEXT: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[JUMP_TABLE:%[0-9]+]]:_(p0) = G_JUMP_TABLE %jump-table.0
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: G_BRJT [[JUMP_TABLE]](p0), %jump-table.0, [[COPY]](s32)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: PseudoRET
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: PseudoRET
+ bb.0.entry:
+ liveins: $x10
+
+ %1:_(p0) = G_JUMP_TABLE %jump-table.0
+ %2:_(s32) = COPY $x10
+ G_BRJT %1(p0), %jump-table.0, %2(s32)
+
+ bb.1:
+ PseudoRET
+
+ bb.2:
+ PseudoRET
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-jumptable.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-jumptable.mir
new file mode 100644
index 000000000000000..95b327c1a907048
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-jumptable.mir
@@ -0,0 +1,31 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - | FileCheck %s
+
+---
+name: test_jump_table
+jumpTable:
+ kind: block-address
+ entries:
+ - id: 0
+ blocks: [ '%bb.1', '%bb.2' ]
+
+body: |
+ ; CHECK-LABEL: name: test_jump_table
+ ; CHECK: bb.0.entry:
+ ; CHECK-NEXT: PseudoRET
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: PseudoRET
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: PseudoRET
+ bb.0.entry:
+ %1:_(p0) = G_JUMP_TABLE %jump-table.0
+ PseudoRET
+
+ bb.1:
+ PseudoRET
+
+ bb.2:
+ PseudoRET
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-brjt.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-brjt.mir
new file mode 100644
index 000000000000000..ac5d80bc9ca176a
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-brjt.mir
@@ -0,0 +1,78 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - | FileCheck %s
+
+---
+name: test_brjt_s32
+jumpTable:
+ kind: block-address
+ entries:
+ - id: 0
+ blocks: [ '%bb.1', '%bb.2' ]
+
+body: |
+ ; CHECK-LABEL: name: test_brjt_s32
+ ; CHECK: bb.0.entry:
+ ; CHECK-NEXT: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[JUMP_TABLE:%[0-9]+]]:_(p0) = G_JUMP_TABLE %jump-table.0
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:_(s64) = G_ASSERT_ZEXT [[COPY]], 32
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[ASSERT_ZEXT]](s64)
+ ; CHECK-NEXT: G_BRJT [[JUMP_TABLE]](p0), %jump-table.0, [[TRUNC]](s32)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: PseudoRET
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: PseudoRET
+ bb.0.entry:
+ liveins: $x10
+
+ %1:_(p0) = G_JUMP_TABLE %jump-table.0
+ %2:_(s64) = COPY $x10
+ %3:_(s64) = G_ASSERT_ZEXT %2, 32
+ %4:_(s32) = G_TRUNC %3
+ G_BRJT %1(p0), %jump-table.0, %4(s32)
+
+ bb.1:
+ PseudoRET
+
+ bb.2:
+ PseudoRET
+...
+---
+name: test_brjt_s64
+jumpTable:
+ kind: block-address
+ entries:
+ - id: 0
+ blocks: [ '%bb.1', '%bb.2' ]
+
+body: |
+ ; CHECK-LABEL: name: test_brjt_s64
+ ; CHECK: bb.0.entry:
+ ; CHECK-NEXT: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[JUMP_TABLE:%[0-9]+]]:_(p0) = G_JUMP_TABLE %jump-table.0
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: G_BRJT [[JUMP_TABLE]](p0), %jump-table.0, [[COPY]](s64)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: PseudoRET
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: PseudoRET
+ bb.0.entry:
+ liveins: $x10
+
+ %1:_(p0) = G_JUMP_TABLE %jump-table.0
+ %2:_(s64) = COPY $x10
+ G_BRJT %1(p0), %jump-table.0, %2(s64)
+
+ bb.1:
+ PseudoRET
+
+ bb.2:
+ PseudoRET
+...
+
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-jumptable.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-jumptable.mir
new file mode 100644
index 000000000000000..ca1d7210fce62b7
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-jumptable.mir
@@ -0,0 +1,31 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - | FileCheck %s
+
+---
+name: test_jump_table
+jumpTable:
+ kind: block-address
+ entries:
+ - id: 0
+ blocks: [ '%bb.1', '%bb.2' ]
+
+body: |
+ ; CHECK-LABEL: name: test_jump_table
+ ; CHECK: bb.0.entry:
+ ; CHECK-NEXT: PseudoRET
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: PseudoRET
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: PseudoRET
+ bb.0.entry:
+ %1:_(p0) = G_JUMP_TABLE %jump-table.0
+ PseudoRET
+
+ bb.1:
+ PseudoRET
+
+ bb.2:
+ PseudoRET
+...
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