[llvm] dd57bd0 - Reapply "RegisterCoalescer: Generate test checks"

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2023-11-10T10:29:08+09:00
New Revision: dd57bd0efe90eeb862473e4a354a67e0c925653e

URL: https://github.com/llvm/llvm-project/commit/dd57bd0efe90eeb862473e4a354a67e0c925653e
DIFF: https://github.com/llvm/llvm-project/commit/dd57bd0efe90eeb862473e4a354a67e0c925653e.diff

LOG: Reapply "RegisterCoalescer: Generate test checks"

This reverts commit 9b2439167d9f794e317fecbdbb0a6e96f9ea4b56.

This was an unrelated NFC change to make a test more useful (really it should
have been first, it was supposed to show the test diff).

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir b/llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
index 14220ee01131f9a..8241a1757af524f 100644
--- a/llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
+++ b/llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
@@ -1,8 +1,39 @@
-# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=register-coalescer -o - %s
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
+# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=register-coalescer -o - %s | FileCheck %s
 ---
 name:  rematerialize_subreg_to_reg_added_impdef_1
 tracksRegLiveness: true
 body:             |
+  ; CHECK-LABEL: name: rematerialize_subreg_to_reg_added_impdef_1
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.1(0x2aaaaaab), %bb.2(0x55555555)
+  ; CHECK-NEXT:   liveins: $edi
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   undef [[MOV32r0_:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = MOV32r0 implicit-def dead $eflags
+  ; CHECK-NEXT:   JCC_1 %bb.2, 5, implicit killed undef $eflags
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1:
+  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   JMP_1 %bb.3
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2:
+  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr64_with_sub_8bit = IMPLICIT_DEF
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.3:
+  ; CHECK-NEXT:   successors: %bb.4(0x30000000), %bb.5(0x50000000)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   JCC_1 %bb.5, 5, implicit killed undef $eflags
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.4:
+  ; CHECK-NEXT:   dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $al
+  ; CHECK-NEXT:   RET 0, killed undef $al
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.5:
+  ; CHECK-NEXT:   MOV64mr undef $noreg, 1, undef $noreg, 0, undef $noreg, [[MOV32r0_]] :: (store (s64))
+  ; CHECK-NEXT:   RET 0, killed undef $al
   bb.0:
     successors: %bb.1(0x2aaaaaab), %bb.2(0x55555555)
     liveins: $edi