[llvm] [Bolt] Solving pie support issue (PR #65494)

Rafael Auler via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 9 12:39:20 PST 2023


rafaelauler wrote:

Hi @JohnLee1243, thanks for your contribution and thanks for the test infra provided to make sure perf2bolt runs fine.

I couldn't repro the problem where the segment info alignment is different than page size alignment with the test case provided. Every time I build it, the linker aligns the segment to have alignment of 0x1000, which is a page size alignment, making the proposed change unnecessary. But I do see that in a scenario where segment is not aligned to page size, your patch makes perfect sense. Do you know how can we make the linker align differently than page size, so we can test the change properly?

I tried in the linker script aligning the sections to a different value, and indeed the sections seem all aligned to something smaller than page size. But when we look at the segment (program headers table), they're all aligned at page size.

Now, regarding the perf2bolt tests: I think we eventually need to test perf2bolt, but I admit I'm slightly concerned about how stable these tests will be. Since the test success will depend on perf successfully collecting samples on a binary that runs for a limited amount of time, not only the test needs to run for a bit of extra time to allow perf to sample it several times, it can also become a brittle test if perf fails to sample it for any reason. I like the idea of making the test conditional on finding perf in the machine, I think it's a good first step. We can just commit a test like this and "see if it breaks often", but the idea of having brittle tests makes me think they might not be worth the pain. I'll discuss this with the team.

https://github.com/llvm/llvm-project/pull/65494


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