[llvm] [AIX][TLS] Optimize the -maix-small-local-exec-tls local-exec access sequence for non-zero offsets (PR #71485)

[via llvm-commits]

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@@ -1514,13 +1522,41 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
   case PPC::LWA: {
     // Verify alignment is legal, so we don't create relocations
     // that can't be supported.
-    unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
+    unsigned OpNum;
+    if (Subtarget->hasAIXSmallLocalExecTLS())
+      OpNum = 1;
+    else
+      OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
     const MachineOperand &MO = MI->getOperand(OpNum);
     if (MO.isGlobal()) {
       const DataLayout &DL = MO.getGlobal()->getParent()->getDataLayout();
       if (MO.getGlobal()->getPointerAlignment(DL) < 4)
         llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
+
+      // A faster non-TOC-based local-exec sequence is represented by
+      // `lwa`/`ld`/`std` directingly loading or storing off of the thread
+      // pointer and with an immediate operand having the MO_TPREL_FLAG.
+      // Such instructions do not otherwise arise.
+      if ((MO.getTargetFlags() & PPCII::MO_TPREL_FLAG) != 0) {
+        assert(Subtarget->hasAIXSmallLocalExecTLS() &&
+               "lwa/ld/std with thread-pointer only expected with "
+               "local-exec small TLS");
+        int64_t Offset = MO.getOffset();
+        // Non-zero offsets for lwa/ld/std require special handling and are
+        // handled here.
+        if (!Offset)
+          break;
+
+        LowerPPCMachineInstrToMCInst(MI, TmpInst, *this);
+        if (Offset) {
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stephenpeckham wrote:

Is this check redundant?

https://github.com/llvm/llvm-project/pull/71485