[llvm] TableGen support for RegisterBankInfo (PR #71357)

[via llvm-commits]

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@@ -229,10 +236,13 @@ void RegisterBankEmitter::emitBaseClassImplementation(
     OS << "const uint32_t " << Bank.getCoverageArrayName() << "[] = {\n";
     unsigned LowestIdxInWord = 0;
     for (const auto &RCs : RCsGroupedByWord) {
-      OS << "    // " << LowestIdxInWord << "-" << (LowestIdxInWord + 31) << "\n";
+      OS << "    // " << LowestIdxInWord << "-" << (LowestIdxInWord + 31)
+         << "\n";
       for (const auto &RC : RCs) {
-        OS << "    (1u << (" << RC->getQualifiedIdName() << " - "
-           << LowestIdxInWord << ")) |\n";
+        std::string QualifiedRegClassID =
+            (Twine(RC->Namespace) + "::" + RC->getName() + "RegClassID").str();
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CBSears wrote:

I didn't write that line and I only changed the line break because Clang Format complained about it.

https://github.com/llvm/llvm-project/pull/71357