[llvm] [AMDGPU] Revert "Preliminary patch for divergence driven instruction selection. Operands Folding 1." (PR #71710)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 9 06:28:18 PST 2023
================
@@ -735,33 +735,6 @@ void SIFoldOperands::foldOperand(
return;
const TargetRegisterClass *DestRC = TRI->getRegClassForReg(*MRI, DestReg);
- if (!DestReg.isPhysical()) {
- if (TRI->isSGPRClass(SrcRC) && TRI->hasVectorRegisters(DestRC)) {
- SmallVector<FoldCandidate, 4> CopyUses;
- for (auto &Use : MRI->use_nodbg_operands(DestReg)) {
- // There's no point trying to fold into an implicit operand.
- if (Use.isImplicit())
- continue;
-
- CopyUses.emplace_back(Use.getParent(),
- Use.getParent()->getOperandNo(&Use),
- &UseMI->getOperand(1));
- }
-
- for (auto &F : CopyUses) {
- foldOperand(*F.OpToFold, F.UseMI, F.UseOpNo, FoldList,
- CopiesToReplace);
- }
- }
-
- if (DestRC == &AMDGPU::AGPR_32RegClass &&
- TII->isInlineConstant(OpToFold, AMDGPU::OPERAND_REG_INLINE_C_INT32)) {
- UseMI->setDesc(TII->get(AMDGPU::V_ACCVGPR_WRITE_B32_e64));
- UseMI->getOperand(1).ChangeToImmediate(OpToFold.getImm());
- CopiesToReplace.push_back(UseMI);
- return;
- }
----------------
jayfoad wrote:
Yes. Thanks. Done.
https://github.com/llvm/llvm-project/pull/71710
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