[llvm] f671584 - [CFIInstrInserter] Use number of supported registers (NFC) (#71797)

via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 9 05:43:49 PST 2023


Author: Nikita Popov
Date: 2023-11-09T14:43:45+01:00
New Revision: f67158422c3bf37ce3884f4579a93f65e083e7fa

URL: https://github.com/llvm/llvm-project/commit/f67158422c3bf37ce3884f4579a93f65e083e7fa
DIFF: https://github.com/llvm/llvm-project/commit/f67158422c3bf37ce3884f4579a93f65e083e7fa.diff

LOG: [CFIInstrInserter] Use number of supported registers (NFC) (#71797)

This makes use of the more accurate register number introduced in PR
#70222 to avoid CFI calculations for unsupported registers.

This has basically no impact right now, but results in a 0.2% compile-time
improvement at O0 when applied on top of #70958.

The reason is that the extra registers that PR adds push the `BitVector`
out of the `SmallVector` space, which results in an outsized impact.
(This does make me wonder whether `BitVector` should accept an `N`
template parameter to allow using a larger `SmallVector`...)

Added: 
    

Modified: 
    llvm/lib/CodeGen/CFIInstrInserter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/CFIInstrInserter.cpp b/llvm/lib/CodeGen/CFIInstrInserter.cpp
index 6a024287f00286f..87b062a16df1d2b 100644
--- a/llvm/lib/CodeGen/CFIInstrInserter.cpp
+++ b/llvm/lib/CodeGen/CFIInstrInserter.cpp
@@ -151,7 +151,7 @@ void CFIInstrInserter::calculateCFAInfo(MachineFunction &MF) {
   Register InitialRegister =
       MF.getSubtarget().getFrameLowering()->getInitialCFARegister(MF);
   InitialRegister = TRI.getDwarfRegNum(InitialRegister, true);
-  unsigned NumRegs = TRI.getNumRegs();
+  unsigned NumRegs = TRI.getNumSupportedRegs(MF);
 
   // Initialize MBBMap.
   for (MachineBasicBlock &MBB : MF) {
@@ -181,7 +181,7 @@ void CFIInstrInserter::calculateOutgoingCFAInfo(MBBCFAInfo &MBBInfo) {
   MachineFunction *MF = MBBInfo.MBB->getParent();
   const std::vector<MCCFIInstruction> &Instrs = MF->getFrameInstructions();
   const TargetRegisterInfo &TRI = *MF->getSubtarget().getRegisterInfo();
-  unsigned NumRegs = TRI.getNumRegs();
+  unsigned NumRegs = TRI.getNumSupportedRegs(*MF);
   BitVector CSRSaved(NumRegs), CSRRestored(NumRegs);
 
   // Determine cfa offset and register set by the block.


        


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