[llvm] [X86] Support EGPR (R16-R31) for APX (PR #70958)

[Nikita Popov via llvm-commits]

================
@@ -611,6 +615,14 @@ BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
     }
   }
 
+  // Reserve the extended general purpose registers.
+  if (!Is64Bit || !MF.getSubtarget<X86Subtarget>().hasEGPR()) {
+    for (unsigned n = 0; n != 16; ++n) {
+      for (MCRegAliasIterator AI(X86::R16 + n, this, true); AI.isValid(); ++AI)
+        Reserved.set(*AI);
+    }
----------------
nikic wrote:

```suggestion
    Reserved.set(X86::R16, X86::R31WH + 1);
```
A more efficient way to set all these registers at once.

https://github.com/llvm/llvm-project/pull/70958