[llvm] dc2cfd0 - [CVP] Add additional sdiv tests (NFC)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2023-11-08T14:49:24+01:00
New Revision: dc2cfd0407ae9b3f2c625b20bb90b62153edfebe

URL: https://github.com/llvm/llvm-project/commit/dc2cfd0407ae9b3f2c625b20bb90b62153edfebe
DIFF: https://github.com/llvm/llvm-project/commit/dc2cfd0407ae9b3f2c625b20bb90b62153edfebe.diff

LOG: [CVP] Add additional sdiv tests (NFC)

Added: 
    

Modified: 
    llvm/test/Transforms/CorrelatedValuePropagation/sdiv.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/CorrelatedValuePropagation/sdiv.ll b/llvm/test/Transforms/CorrelatedValuePropagation/sdiv.ll
index 1601490b2c1e13c..470e99d31ef81db 100644
--- a/llvm/test/Transforms/CorrelatedValuePropagation/sdiv.ll
+++ b/llvm/test/Transforms/CorrelatedValuePropagation/sdiv.ll
@@ -632,3 +632,81 @@ entry:
   %div = sdiv exact i64 %x, %y
   ret i64 %div
 }
+
+define void @sdiv_zero(ptr %p, i32 %arg) {
+; CHECK-LABEL: @sdiv_zero(
+; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[ARG:%.*]], 5
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ADD]], 11
+; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT:    [[DIV_LHS_TRUNC:%.*]] = trunc i32 [[ARG]] to i8
+; CHECK-NEXT:    [[DIV1:%.*]] = sdiv i8 [[DIV_LHS_TRUNC]], 6
+; CHECK-NEXT:    [[DIV_SEXT:%.*]] = sext i8 [[DIV1]] to i32
+; CHECK-NEXT:    store i32 [[DIV_SEXT]], ptr [[P:%.*]], align 4
+; CHECK-NEXT:    ret void
+;
+  %add = add i32 %arg, 5
+  %cmp = icmp ult i32 %add, 11
+  call void @llvm.assume(i1 %cmp)
+  %div = sdiv i32 %arg, 6
+  store i32 %div, ptr %p
+  ret void
+}
+
+define void @sdiv_not_zero(ptr %p, i32 %arg) {
+; CHECK-LABEL: @sdiv_not_zero(
+; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[ARG:%.*]], 5
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ADD]], 12
+; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT:    [[DIV_LHS_TRUNC:%.*]] = trunc i32 [[ARG]] to i8
+; CHECK-NEXT:    [[DIV1:%.*]] = sdiv i8 [[DIV_LHS_TRUNC]], 6
+; CHECK-NEXT:    [[DIV_SEXT:%.*]] = sext i8 [[DIV1]] to i32
+; CHECK-NEXT:    store i32 [[DIV_SEXT]], ptr [[P:%.*]], align 4
+; CHECK-NEXT:    ret void
+;
+  %add = add i32 %arg, 5
+  %cmp = icmp ult i32 %add, 12
+  call void @llvm.assume(i1 %cmp)
+  %div = sdiv i32 %arg, 6
+  store i32 %div, ptr %p
+  ret void
+}
+
+define void @sdiv_pos(ptr %p, i32 %arg) {
+; CHECK-LABEL: @sdiv_pos(
+; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[ARG:%.*]], -12
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ADD]], 6
+; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT:    [[DIV1_LHS_TRUNC:%.*]] = trunc i32 [[ARG]] to i8
+; CHECK-NEXT:    [[DIV12:%.*]] = udiv i8 [[DIV1_LHS_TRUNC]], 6
+; CHECK-NEXT:    [[DIV1_ZEXT:%.*]] = zext i8 [[DIV12]] to i32
+; CHECK-NEXT:    store i32 [[DIV1_ZEXT]], ptr [[P:%.*]], align 4
+; CHECK-NEXT:    ret void
+;
+  %add = add i32 %arg, -12
+  %cmp = icmp ult i32 %add, 6
+  call void @llvm.assume(i1 %cmp)
+  %div = sdiv i32 %arg, 6
+  store i32 %div, ptr %p
+  ret void
+}
+
+define void @sdiv_neg(ptr %p, i32 %arg) {
+; CHECK-LABEL: @sdiv_neg(
+; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[ARG:%.*]], 17
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 [[ADD]], 6
+; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT:    [[ARG_NONNEG:%.*]] = sub i32 0, [[ARG]]
+; CHECK-NEXT:    [[DIV1_LHS_TRUNC:%.*]] = trunc i32 [[ARG_NONNEG]] to i8
+; CHECK-NEXT:    [[DIV12:%.*]] = udiv i8 [[DIV1_LHS_TRUNC]], 6
+; CHECK-NEXT:    [[DIV1_ZEXT:%.*]] = zext i8 [[DIV12]] to i32
+; CHECK-NEXT:    [[DIV1_NEG:%.*]] = sub i32 0, [[DIV1_ZEXT]]
+; CHECK-NEXT:    store i32 [[DIV1_NEG]], ptr [[P:%.*]], align 4
+; CHECK-NEXT:    ret void
+;
+  %add = add i32 %arg, 17
+  %cmp = icmp ult i32 %add, 6
+  call void @llvm.assume(i1 %cmp)
+  %div = sdiv i32 %arg, 6
+  store i32 %div, ptr %p
+  ret void
+}