[llvm] [RISCV] Unify vsetvli compatibility logic in forward and backwards passes (PR #71657)

Wang Pengcheng via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 8 04:08:59 PST 2023


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@@ -329,9 +329,9 @@ entry:
 define double @test17(i64 %avl, <vscale x 1 x double> %a, <vscale x 1 x double> %b) nounwind {
 ; CHECK-LABEL: test17:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    vsetvli a0, a0, e64, m1, ta, ma
-; CHECK-NEXT:    vfmv.f.s fa5, v8
+; CHECK-NEXT:    vsetvli a0, a0, e32, mf2, ta, ma
----------------
wangpc-pp wrote:

This case can be far more optimized I think. Only one `vsetvli zero, a0, e64, m1, ta, ma` is needed here?

https://github.com/llvm/llvm-project/pull/71657


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