[llvm] 33ecd93 - [X86] Add test coverage for ABDS/ABDU patterns with mismatching extension types
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 8 02:59:53 PST 2023
Author: Simon Pilgrim
Date: 2023-11-08T10:33:18Z
New Revision: 33ecd935963a622349140ca633fa72ddc2c8a1ab
URL: https://github.com/llvm/llvm-project/commit/33ecd935963a622349140ca633fa72ddc2c8a1ab
DIFF: https://github.com/llvm/llvm-project/commit/33ecd935963a622349140ca633fa72ddc2c8a1ab.diff
LOG: [X86] Add test coverage for ABDS/ABDU patterns with mismatching extension types
Added:
Modified:
llvm/test/CodeGen/X86/abds.ll
llvm/test/CodeGen/X86/abdu.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/abds.ll b/llvm/test/CodeGen/X86/abds.ll
index daed1125e9deebb..c5be2474c84d405 100644
--- a/llvm/test/CodeGen/X86/abds.ll
+++ b/llvm/test/CodeGen/X86/abds.ll
@@ -36,6 +36,39 @@ define i8 @abd_ext_i8(i8 %a, i8 %b) nounwind {
ret i8 %trunc
}
+define i8 @abd_ext_i8_i16(i8 %a, i16 %b) nounwind {
+; X86-LABEL: abd_ext_i8_i16:
+; X86: # %bb.0:
+; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movsbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: subl %eax, %ecx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: negl %eax
+; X86-NEXT: cmovsl %ecx, %eax
+; X86-NEXT: # kill: def $al killed $al killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: abd_ext_i8_i16:
+; X64: # %bb.0:
+; X64-NEXT: # kill: def $esi killed $esi def $rsi
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: movsbq %dil, %rax
+; X64-NEXT: movswq %si, %rcx
+; X64-NEXT: movq %rax, %rdx
+; X64-NEXT: subq %rcx, %rdx
+; X64-NEXT: negq %rdx
+; X64-NEXT: subq %rcx, %rax
+; X64-NEXT: cmovleq %rdx, %rax
+; X64-NEXT: # kill: def $al killed $al killed $rax
+; X64-NEXT: retq
+ %aext = sext i8 %a to i64
+ %bext = sext i16 %b to i64
+ %sub = sub i64 %aext, %bext
+ %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
+ %trunc = trunc i64 %abs to i8
+ ret i8 %trunc
+}
+
define i8 @abd_ext_i8_undef(i8 %a, i8 %b) nounwind {
; X86-LABEL: abd_ext_i8_undef:
; X86: # %bb.0:
@@ -96,6 +129,45 @@ define i16 @abd_ext_i16(i16 %a, i16 %b) nounwind {
ret i16 %trunc
}
+define i16 @abd_ext_i16_i32(i16 %a, i32 %b) nounwind {
+; X86-LABEL: abd_ext_i16_i32:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: sarl $31, %edx
+; X86-NEXT: movswl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %esi
+; X86-NEXT: sarl $31, %esi
+; X86-NEXT: subl %ecx, %eax
+; X86-NEXT: sbbl %edx, %esi
+; X86-NEXT: sarl $31, %esi
+; X86-NEXT: xorl %esi, %eax
+; X86-NEXT: subl %esi, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
+;
+; X64-LABEL: abd_ext_i16_i32:
+; X64: # %bb.0:
+; X64-NEXT: # kill: def $edi killed $edi def $rdi
+; X64-NEXT: movswq %di, %rax
+; X64-NEXT: movslq %esi, %rcx
+; X64-NEXT: movq %rax, %rdx
+; X64-NEXT: subq %rcx, %rdx
+; X64-NEXT: negq %rdx
+; X64-NEXT: subq %rcx, %rax
+; X64-NEXT: cmovleq %rdx, %rax
+; X64-NEXT: # kill: def $ax killed $ax killed $rax
+; X64-NEXT: retq
+ %aext = sext i16 %a to i64
+ %bext = sext i32 %b to i64
+ %sub = sub i64 %aext, %bext
+ %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
+ %trunc = trunc i64 %abs to i16
+ ret i16 %trunc
+}
+
define i16 @abd_ext_i16_undef(i16 %a, i16 %b) nounwind {
; X86-LABEL: abd_ext_i16_undef:
; X86: # %bb.0:
@@ -156,6 +228,44 @@ define i32 @abd_ext_i32(i32 %a, i32 %b) nounwind {
ret i32 %trunc
}
+define i32 @abd_ext_i32_i16(i32 %a, i16 %b) nounwind {
+; X86-LABEL: abd_ext_i32_i16:
+; X86: # %bb.0:
+; X86-NEXT: pushl %esi
+; X86-NEXT: movswl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: sarl $31, %edx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl %eax, %esi
+; X86-NEXT: sarl $31, %esi
+; X86-NEXT: subl %ecx, %eax
+; X86-NEXT: sbbl %edx, %esi
+; X86-NEXT: sarl $31, %esi
+; X86-NEXT: xorl %esi, %eax
+; X86-NEXT: subl %esi, %eax
+; X86-NEXT: popl %esi
+; X86-NEXT: retl
+;
+; X64-LABEL: abd_ext_i32_i16:
+; X64: # %bb.0:
+; X64-NEXT: # kill: def $esi killed $esi def $rsi
+; X64-NEXT: movslq %edi, %rax
+; X64-NEXT: movswq %si, %rcx
+; X64-NEXT: movq %rax, %rdx
+; X64-NEXT: subq %rcx, %rdx
+; X64-NEXT: negq %rdx
+; X64-NEXT: subq %rcx, %rax
+; X64-NEXT: cmovleq %rdx, %rax
+; X64-NEXT: # kill: def $eax killed $eax killed $rax
+; X64-NEXT: retq
+ %aext = sext i32 %a to i64
+ %bext = sext i16 %b to i64
+ %sub = sub i64 %aext, %bext
+ %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
+ %trunc = trunc i64 %abs to i32
+ ret i32 %trunc
+}
+
define i32 @abd_ext_i32_undef(i32 %a, i32 %b) nounwind {
; X86-LABEL: abd_ext_i32_undef:
; X86: # %bb.0:
diff --git a/llvm/test/CodeGen/X86/abdu.ll b/llvm/test/CodeGen/X86/abdu.ll
index 195a74dac2b9e85..fe805528c435a52 100644
--- a/llvm/test/CodeGen/X86/abdu.ll
+++ b/llvm/test/CodeGen/X86/abdu.ll
@@ -36,6 +36,37 @@ define i8 @abd_ext_i8(i8 %a, i8 %b) nounwind {
ret i8 %trunc
}
+define i8 @abd_ext_i8_i16(i8 %a, i16 %b) nounwind {
+; X86-LABEL: abd_ext_i8_i16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: subl %eax, %ecx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: negl %eax
+; X86-NEXT: cmovsl %ecx, %eax
+; X86-NEXT: # kill: def $al killed $al killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: abd_ext_i8_i16:
+; X64: # %bb.0:
+; X64-NEXT: movzbl %dil, %eax
+; X64-NEXT: movzwl %si, %ecx
+; X64-NEXT: movq %rax, %rdx
+; X64-NEXT: subq %rcx, %rdx
+; X64-NEXT: negq %rdx
+; X64-NEXT: subq %rcx, %rax
+; X64-NEXT: cmovbeq %rdx, %rax
+; X64-NEXT: # kill: def $al killed $al killed $rax
+; X64-NEXT: retq
+ %aext = zext i8 %a to i64
+ %bext = zext i16 %b to i64
+ %sub = sub i64 %aext, %bext
+ %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
+ %trunc = trunc i64 %abs to i8
+ ret i8 %trunc
+}
+
define i8 @abd_ext_i8_undef(i8 %a, i8 %b) nounwind {
; X86-LABEL: abd_ext_i8_undef:
; X86: # %bb.0:
@@ -96,6 +127,38 @@ define i16 @abd_ext_i16(i16 %a, i16 %b) nounwind {
ret i16 %trunc
}
+define i16 @abd_ext_i16_i32(i16 %a, i32 %b) nounwind {
+; X86-LABEL: abd_ext_i16_i32:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: xorl %ecx, %ecx
+; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: sbbl %ecx, %ecx
+; X86-NEXT: sarl $31, %ecx
+; X86-NEXT: xorl %ecx, %eax
+; X86-NEXT: subl %ecx, %eax
+; X86-NEXT: # kill: def $ax killed $ax killed $eax
+; X86-NEXT: retl
+;
+; X64-LABEL: abd_ext_i16_i32:
+; X64: # %bb.0:
+; X64-NEXT: movzwl %di, %eax
+; X64-NEXT: movl %esi, %ecx
+; X64-NEXT: movq %rax, %rdx
+; X64-NEXT: subq %rcx, %rdx
+; X64-NEXT: negq %rdx
+; X64-NEXT: subq %rcx, %rax
+; X64-NEXT: cmovbeq %rdx, %rax
+; X64-NEXT: # kill: def $ax killed $ax killed $rax
+; X64-NEXT: retq
+ %aext = zext i16 %a to i64
+ %bext = zext i32 %b to i64
+ %sub = sub i64 %aext, %bext
+ %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
+ %trunc = trunc i64 %abs to i16
+ ret i16 %trunc
+}
+
define i16 @abd_ext_i16_undef(i16 %a, i16 %b) nounwind {
; X86-LABEL: abd_ext_i16_undef:
; X86: # %bb.0:
@@ -156,6 +219,38 @@ define i32 @abd_ext_i32(i32 %a, i32 %b) nounwind {
ret i32 %trunc
}
+define i32 @abd_ext_i32_i16(i32 %a, i16 %b) nounwind {
+; X86-LABEL: abd_ext_i32_i16:
+; X86: # %bb.0:
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: subl %ecx, %eax
+; X86-NEXT: sbbl %edx, %edx
+; X86-NEXT: sarl $31, %edx
+; X86-NEXT: xorl %edx, %eax
+; X86-NEXT: subl %edx, %eax
+; X86-NEXT: retl
+;
+; X64-LABEL: abd_ext_i32_i16:
+; X64: # %bb.0:
+; X64-NEXT: movl %edi, %eax
+; X64-NEXT: movzwl %si, %ecx
+; X64-NEXT: movq %rax, %rdx
+; X64-NEXT: subq %rcx, %rdx
+; X64-NEXT: negq %rdx
+; X64-NEXT: subq %rcx, %rax
+; X64-NEXT: cmovbeq %rdx, %rax
+; X64-NEXT: # kill: def $eax killed $eax killed $rax
+; X64-NEXT: retq
+ %aext = zext i32 %a to i64
+ %bext = zext i16 %b to i64
+ %sub = sub i64 %aext, %bext
+ %abs = call i64 @llvm.abs.i64(i64 %sub, i1 false)
+ %trunc = trunc i64 %abs to i32
+ ret i32 %trunc
+}
+
define i32 @abd_ext_i32_undef(i32 %a, i32 %b) nounwind {
; X86-LABEL: abd_ext_i32_undef:
; X86: # %bb.0:
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