[llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)

[Nicolas Miller via llvm-commits]

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@@ -317,10 +317,38 @@ static bool processUse(CallInst *CI, bool IsV5OrAbove) {
   return MadeChange;
 }
 
+// SYCL allows required work-group size attribute to be partially specified
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npmiller wrote:

So just to clarify based on the examples below, the main reason we need to do this is because the ROCm toolchain expects 3 entries in the final metadata?

Would it make more sense/be more acceptable to update this pass to handle any number of dimensions, and to instead add the padding when generating the AMD specific binary metadata for `reqd_work_group_size`, rather than doing it at IR level?

https://github.com/llvm/llvm-project/pull/68872