[llvm] [WIP] - [LLVM][SVE] Honour NEON calling convention when targeting SVE VLS. (PR #70847)

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vfdff wrote:

> > hi @paulwalker-arm , If we still prefer the `NEON` regitster, can we just ignore to addRegisterClass for these fix registers, whose vector length is bigger than 128-bit?
> > https://github.com/llvm/llvm-project/blob/00165653212757733dd3dce01d1ba02319adcf2b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp#L413
> 
> No because we still want such types to be legal so that in function code generation can use them. This patch just ensures that at function call boundaries the "legal" types are restricted to those which are defined by an ABI.
> 
> I've also started thinking about whether this scheme means I can also make fixed length i1 vectors legal so that we can make better use of the predicate registers because there's a few cases where force extending them to i8 vectors causes pretty bad code. This is especially true when crossing basic block boundaries.

thanks very much for your explaination :)

https://github.com/llvm/llvm-project/pull/70847