[llvm] a6c80c4 - [RISCV][GISel] Add support for G_SITOFP/G_UITOFP with F and D extensions.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 7 16:44:29 PST 2023
Author: Craig Topper
Date: 2023-11-07T16:40:58-08:00
New Revision: a6c80c4f70c35da2227cd01cf6558d62ee8ed45c
URL: https://github.com/llvm/llvm-project/commit/a6c80c4f70c35da2227cd01cf6558d62ee8ed45c
DIFF: https://github.com/llvm/llvm-project/commit/a6c80c4f70c35da2227cd01cf6558d62ee8ed45c.diff
LOG: [RISCV][GISel] Add support for G_SITOFP/G_UITOFP with F and D extensions.
Added:
llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-rv32.mir
llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-rv64.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-itofp.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-itofp.mir
llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/itofp-rv32.mir
llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/itofp-rv64.mir
Modified:
llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index 3adedf9bc2a5bd7..c5cf4debb52d7e2 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -226,6 +226,15 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
.widenScalarToNextPow2(0)
.clampScalar(0, s32, sXLen);
+ getActionDefinitionsBuilder({G_SITOFP, G_UITOFP})
+ .legalIf([=, &ST](const LegalityQuery &Query) -> bool {
+ return ((ST.hasStdExtF() && typeIs(0, s32)(Query)) ||
+ (ST.hasStdExtD() && typeIs(0, s64)(Query))) &&
+ typeInSet(1, {s32, sXLen})(Query);
+ })
+ .widenScalarToNextPow2(1)
+ .clampScalar(1, s32, sXLen);
+
getLegacyLegalizerInfo().computeTables();
}
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
index 02b89b902b9924f..44ed072b0e81b3c 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
@@ -219,6 +219,13 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
getFPValueMapping(Ty.getSizeInBits())});
break;
}
+ case TargetOpcode::G_SITOFP:
+ case TargetOpcode::G_UITOFP: {
+ LLT Ty = MRI.getType(MI.getOperand(0).getReg());
+ OperandsMapping = getOperandsMapping(
+ {getFPValueMapping(Ty.getSizeInBits()), GPRValueMapping});
+ break;
+ }
case TargetOpcode::G_FCONSTANT: {
LLT Ty = MRI.getType(MI.getOperand(0).getReg());
OperandsMapping =
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-rv32.mir
new file mode 100644
index 000000000000000..d87a44d9c9a5061
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-rv32.mir
@@ -0,0 +1,92 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=instruction-select \
+# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
+
+---
+name: sitofp_s32_s32
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_S_W:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_W [[COPY]], 7
+ ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_W]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:gprb(s32) = COPY $x10
+ %1:fprb(s32) = G_SITOFP %0(s32)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s32
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_S_WU:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_WU [[COPY]], 7
+ ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_WU]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:gprb(s32) = COPY $x10
+ %1:fprb(s32) = G_UITOFP %0(s32)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s64_s32
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_D_W:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_W [[COPY]], 0
+ ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_W]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:gprb(s32) = COPY $x10
+ %1:fprb(s64) = G_SITOFP %0(s32)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s32
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_D_WU:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_WU [[COPY]], 0
+ ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_WU]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:gprb(s32) = COPY $x10
+ %1:fprb(s64) = G_UITOFP %0(s32)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-rv64.mir
new file mode 100644
index 000000000000000..31175d7af93f980
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/itofp-rv64.mir
@@ -0,0 +1,184 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=instruction-select \
+# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
+
+---
+name: sitofp_s32_s32
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_S_W:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_W [[COPY]], 7
+ ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_W]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:gprb(s64) = COPY $x10
+ %1:gprb(s32) = G_TRUNC %0(s64)
+ %2:fprb(s32) = G_SITOFP %1(s32)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s32
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_S_WU:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_WU [[COPY]], 7
+ ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_WU]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:gprb(s64) = COPY $x10
+ %1:gprb(s32) = G_TRUNC %0(s64)
+ %2:fprb(s32) = G_UITOFP %1(s32)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s32_s64
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_S_L:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_L [[COPY]], 7
+ ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_L]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:gprb(s64) = COPY $x10
+ %1:fprb(s32) = G_SITOFP %0(s64)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s64
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_S_LU:%[0-9]+]]:fpr32 = nofpexcept FCVT_S_LU [[COPY]], 7
+ ; CHECK-NEXT: $f10_f = COPY [[FCVT_S_LU]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:gprb(s64) = COPY $x10
+ %1:fprb(s32) = G_UITOFP %0(s64)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s64_s32
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_D_W:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_W [[COPY]], 0
+ ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_W]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:gprb(s64) = COPY $x10
+ %1:gprb(s32) = G_TRUNC %0(s64)
+ %2:fprb(s64) = G_SITOFP %1(s32)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s32
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_D_WU:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_WU [[COPY]], 0
+ ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_WU]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:gprb(s64) = COPY $x10
+ %1:gprb(s32) = G_TRUNC %0(s64)
+ %2:fprb(s64) = G_UITOFP %1(s32)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: sitofp_s64_s64
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_D_L:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_L [[COPY]], 7
+ ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_L]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:gprb(s64) = COPY $x10
+ %1:fprb(s64) = G_SITOFP %0(s64)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s64
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
+ ; CHECK-NEXT: [[FCVT_D_LU:%[0-9]+]]:fpr64 = nofpexcept FCVT_D_LU [[COPY]], 7
+ ; CHECK-NEXT: $f10_d = COPY [[FCVT_D_LU]]
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:gprb(s64) = COPY $x10
+ %1:fprb(s64) = G_UITOFP %0(s64)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-itofp.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-itofp.mir
new file mode 100644
index 000000000000000..614296583a4633b
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-itofp.mir
@@ -0,0 +1,366 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=legalizer %s -o - \
+# RUN: | FileCheck %s
+
+---
+name: sitofp_s32_s1
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s1
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s32) = COPY $x10
+ %0:_(s1) = G_TRUNC %1(s32)
+ %2:_(s32) = G_SITOFP %0(s1)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s1
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s1
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s32) = COPY $x10
+ %0:_(s1) = G_TRUNC %1(s32)
+ %2:_(s32) = G_UITOFP %0(s1)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s32_s8
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s8
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s32) = COPY $x10
+ %0:_(s8) = G_TRUNC %1(s32)
+ %2:_(s32) = G_SITOFP %0(s8)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s8
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s8
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s32) = COPY $x10
+ %0:_(s8) = G_TRUNC %1(s32)
+ %2:_(s32) = G_UITOFP %0(s8)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s32_s16
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s16
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s32) = COPY $x10
+ %0:_(s16) = G_TRUNC %1(s32)
+ %2:_(s32) = G_SITOFP %0(s16)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s16
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s16
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s32) = COPY $x10
+ %0:_(s16) = G_TRUNC %1(s32)
+ %2:_(s32) = G_UITOFP %0(s16)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s32_s32
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s32) = COPY $x10
+ %1:_(s32) = G_SITOFP %0(s32)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s32
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[COPY]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s32) = COPY $x10
+ %1:_(s32) = G_UITOFP %0(s32)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s64_s1
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s1
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s32) = COPY $x10
+ %0:_(s1) = G_TRUNC %1(s32)
+ %2:_(s64) = G_SITOFP %0(s1)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s1
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s1
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s32) = COPY $x10
+ %0:_(s1) = G_TRUNC %1(s32)
+ %2:_(s64) = G_UITOFP %0(s1)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: sitofp_s64_s8
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s8
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s32) = COPY $x10
+ %0:_(s8) = G_TRUNC %1(s32)
+ %2:_(s64) = G_SITOFP %0(s8)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s8
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s8
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s32) = COPY $x10
+ %0:_(s8) = G_TRUNC %1(s32)
+ %2:_(s64) = G_UITOFP %0(s8)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: sitofp_s64_s16
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s16
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s32) = COPY $x10
+ %0:_(s16) = G_TRUNC %1(s32)
+ %2:_(s64) = G_SITOFP %0(s16)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s16
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s16
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s32) = COPY $x10
+ %0:_(s16) = G_TRUNC %1(s32)
+ %2:_(s64) = G_UITOFP %0(s16)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: sitofp_s64_s32
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[COPY]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s32) = COPY $x10
+ %1:_(s64) = G_SITOFP %0(s32)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s32
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[COPY]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s32) = COPY $x10
+ %1:_(s64) = G_UITOFP %0(s32)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-itofp.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-itofp.mir
new file mode 100644
index 000000000000000..bc09a44dee2e092
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-itofp.mir
@@ -0,0 +1,466 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
+# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=legalizer %s -o - \
+# RUN: | FileCheck %s
+
+---
+name: sitofp_s32_s1
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s1
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s64) = COPY $x10
+ %0:_(s1) = G_TRUNC %1(s64)
+ %2:_(s32) = G_SITOFP %0(s1)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s1
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s1
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s64) = COPY $x10
+ %0:_(s1) = G_TRUNC %1(s64)
+ %2:_(s32) = G_UITOFP %0(s1)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s32_s8
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s8
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s64) = COPY $x10
+ %0:_(s8) = G_TRUNC %1(s64)
+ %2:_(s32) = G_SITOFP %0(s8)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s8
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s8
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s64) = COPY $x10
+ %0:_(s8) = G_TRUNC %1(s64)
+ %2:_(s32) = G_UITOFP %0(s8)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s32_s16
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s16
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s64) = COPY $x10
+ %0:_(s16) = G_TRUNC %1(s64)
+ %2:_(s32) = G_SITOFP %0(s16)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s16
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s16
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s64) = COPY $x10
+ %0:_(s16) = G_TRUNC %1(s64)
+ %2:_(s32) = G_UITOFP %0(s16)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s32_s32
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[TRUNC]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s64) = COPY $x10
+ %0:_(s32) = G_TRUNC %1(s64)
+ %2:_(s32) = G_SITOFP %0(s32)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s32
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[TRUNC]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %1:_(s64) = COPY $x10
+ %0:_(s32) = G_TRUNC %1(s64)
+ %2:_(s32) = G_UITOFP %0(s32)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s32_s64
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY]](s64)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s64) = COPY $x10
+ %1:_(s32) = G_SITOFP %0(s64)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s64
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[COPY]](s64)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s64) = COPY $x10
+ %1:_(s32) = G_UITOFP %0(s64)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s64_s1
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s1
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s64) = COPY $x10
+ %0:_(s1) = G_TRUNC %1(s64)
+ %2:_(s64) = G_SITOFP %0(s1)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s1
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s1
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s64) = COPY $x10
+ %0:_(s1) = G_TRUNC %1(s64)
+ %2:_(s64) = G_UITOFP %0(s1)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: sitofp_s64_s8
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s8
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s64) = COPY $x10
+ %0:_(s8) = G_TRUNC %1(s64)
+ %2:_(s64) = G_SITOFP %0(s8)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s8
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s8
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s64) = COPY $x10
+ %0:_(s8) = G_TRUNC %1(s64)
+ %2:_(s64) = G_UITOFP %0(s8)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: sitofp_s64_s16
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s16
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[TRUNC]], [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[ASHR]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s64) = COPY $x10
+ %0:_(s16) = G_TRUNC %1(s64)
+ %2:_(s64) = G_SITOFP %0(s16)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s16
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s16
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]]
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[AND]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s64) = COPY $x10
+ %0:_(s16) = G_TRUNC %1(s64)
+ %2:_(s64) = G_UITOFP %0(s16)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: sitofp_s64_s32
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[TRUNC]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s64) = COPY $x10
+ %0:_(s32) = G_TRUNC %1(s64)
+ %2:_(s64) = G_SITOFP %0(s32)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s32
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[TRUNC]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %1:_(s64) = COPY $x10
+ %0:_(s32) = G_TRUNC %1(s64)
+ %2:_(s64) = G_UITOFP %0(s32)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: sitofp_s64_s64
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[COPY]](s64)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s64) = COPY $x10
+ %1:_(s64) = G_SITOFP %0(s64)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s64
+tracksRegLiveness: true
+body: |
+ bb.1:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[COPY]](s64)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s64) = COPY $x10
+ %1:_(s64) = G_UITOFP %0(s64)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/itofp-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/itofp-rv32.mir
new file mode 100644
index 000000000000000..e4e9af7a0f6d8f0
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/itofp-rv32.mir
@@ -0,0 +1,89 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -mattr=+d -run-pass=regbankselect \
+# RUN: -simplify-mir -verify-machineinstrs %s \
+# RUN: -o - | FileCheck %s
+
+---
+name: sitofp_s32_s32
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fprb(s32) = G_SITOFP [[COPY]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s32) = COPY $x10
+ %1:_(s32) = G_SITOFP %0(s32)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s32
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:fprb(s32) = G_UITOFP [[COPY]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s32) = COPY $x10
+ %1:_(s32) = G_UITOFP %0(s32)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s64_s32
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fprb(s64) = G_SITOFP [[COPY]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s32) = COPY $x10
+ %1:_(s64) = G_SITOFP %0(s32)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s32
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:fprb(s64) = G_UITOFP [[COPY]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s32) = COPY $x10
+ %1:_(s64) = G_UITOFP %0(s32)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/itofp-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/itofp-rv64.mir
new file mode 100644
index 000000000000000..e0f039d5983ee8d
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/itofp-rv64.mir
@@ -0,0 +1,181 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv64 -mattr=+d -run-pass=regbankselect \
+# RUN: -simplify-mir -verify-machineinstrs %s \
+# RUN: -o - | FileCheck %s
+
+---
+name: sitofp_s32_s32
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gprb(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fprb(s32) = G_SITOFP [[TRUNC]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s64) = COPY $x10
+ %1:_(s32) = G_TRUNC %0(s64)
+ %2:_(s32) = G_SITOFP %1(s32)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s32
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gprb(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:fprb(s32) = G_UITOFP [[TRUNC]](s32)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s64) = COPY $x10
+ %1:_(s32) = G_TRUNC %0(s64)
+ %2:_(s32) = G_UITOFP %1(s32)
+ $f10_f = COPY %2(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s32_s64
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s32_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fprb(s32) = G_SITOFP [[COPY]](s64)
+ ; CHECK-NEXT: $f10_f = COPY [[SITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s64) = COPY $x10
+ %1:_(s32) = G_SITOFP %0(s64)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: uitofp_s32_s64
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s32_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:fprb(s32) = G_UITOFP [[COPY]](s64)
+ ; CHECK-NEXT: $f10_f = COPY [[UITOFP]](s32)
+ ; CHECK-NEXT: PseudoRET implicit $f10_f
+ %0:_(s64) = COPY $x10
+ %1:_(s32) = G_UITOFP %0(s64)
+ $f10_f = COPY %1(s32)
+ PseudoRET implicit $f10_f
+
+...
+---
+name: sitofp_s64_s32
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gprb(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fprb(s64) = G_SITOFP [[TRUNC]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s64) = COPY $x10
+ %1:_(s32) = G_TRUNC %0(s64)
+ %2:_(s64) = G_SITOFP %1(s32)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s32
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s32
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
+ ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:gprb(s32) = G_TRUNC [[COPY]](s64)
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:fprb(s64) = G_UITOFP [[TRUNC]](s32)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s64) = COPY $x10
+ %1:_(s32) = G_TRUNC %0(s64)
+ %2:_(s64) = G_UITOFP %1(s32)
+ $f10_d = COPY %2(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: sitofp_s64_s64
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: sitofp_s64_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
+ ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:fprb(s64) = G_SITOFP [[COPY]](s64)
+ ; CHECK-NEXT: $f10_d = COPY [[SITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s64) = COPY $x10
+ %1:_(s64) = G_SITOFP %0(s64)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
+---
+name: uitofp_s64_s64
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x10
+
+ ; CHECK-LABEL: name: uitofp_s64_s64
+ ; CHECK: liveins: $x10
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
+ ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:fprb(s64) = G_UITOFP [[COPY]](s64)
+ ; CHECK-NEXT: $f10_d = COPY [[UITOFP]](s64)
+ ; CHECK-NEXT: PseudoRET implicit $f10_d
+ %0:_(s64) = COPY $x10
+ %1:_(s64) = G_UITOFP %0(s64)
+ $f10_d = COPY %1(s64)
+ PseudoRET implicit $f10_d
+
+...
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