[mlir] [llvm] Obsolete WebKit Calling Convention (PR #71567)

Juergen Ributzka via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 7 11:56:03 PST 2023


https://github.com/ributzka updated https://github.com/llvm/llvm-project/pull/71567

>From ade9c231ac9c5c93166552a68f4172574efa69d5 Mon Sep 17 00:00:00 2001
From: Juergen Ributzka <juergen at ributzka.de>
Date: Mon, 6 Nov 2023 16:12:15 -0800
Subject: [PATCH 1/2] Obsolete WebKit Calling Convention

The WebKit Calling Convention was created specifically for the WebKit FTL. FTL
doesn't use LLVM anymore and therefore this calling convention is obsolete.

This commit removes the WebKit CC, its associated tests, and documentation.
---
 llvm/docs/BitCodeFormat.rst                   |   1 -
 llvm/docs/LangRef.rst                         |   5 -
 llvm/include/llvm/AsmParser/LLToken.h         |   1 -
 llvm/include/llvm/IR/CallingConv.h            |   4 +-
 llvm/lib/AsmParser/LLLexer.cpp                |   1 -
 llvm/lib/AsmParser/LLParser.cpp               |   2 -
 llvm/lib/IR/AsmWriter.cpp                     |   1 -
 .../Target/AArch64/AArch64CallingConvention.h |   6 -
 .../AArch64/AArch64CallingConvention.td       |  25 ----
 llvm/lib/Target/AArch64/AArch64FastISel.cpp   |   6 +-
 .../Target/AArch64/AArch64ISelLowering.cpp    |   5 +-
 .../Target/AArch64/AArch64RegisterInfo.cpp    |   2 -
 llvm/lib/Target/X86/X86CallingConv.td         |  29 +----
 llvm/lib/Target/X86/X86FastISel.cpp           |   3 +-
 llvm/test/Bitcode/compatibility-3.6.ll        |   2 -
 llvm/test/Bitcode/compatibility-3.7.ll        |   2 -
 llvm/test/Bitcode/compatibility-3.8.ll        |   2 -
 llvm/test/Bitcode/compatibility-3.9.ll        |   2 -
 llvm/test/Bitcode/compatibility-4.0.ll        |   2 -
 llvm/test/Bitcode/compatibility-5.0.ll        |   2 -
 llvm/test/Bitcode/compatibility-6.0.ll        |   2 -
 llvm/test/Bitcode/compatibility.ll            |   2 -
 .../AArch64/arm64-patchpoint-webkit_jscc.ll   | 118 ------------------
 llvm/test/CodeGen/AArch64/arm64-stackmap.ll   |  30 +----
 llvm/test/CodeGen/AArch64/stackmap.ll         |  29 +----
 llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll   |  23 ----
 .../test/CodeGen/X86/deopt-intrinsic-cconv.ll |  34 -----
 .../CodeGen/X86/patchpoint-webkit_jscc.ll     |  82 ------------
 llvm/test/CodeGen/X86/stackmap.ll             |  29 +----
 llvm/test/CodeGen/X86/webkit-jscc.ll          |  18 ---
 llvm/utils/emacs/llvm-mode.el                 |   2 +-
 mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td |   2 -
 32 files changed, 13 insertions(+), 461 deletions(-)
 delete mode 100644 llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll
 delete mode 100644 llvm/test/CodeGen/X86/deopt-intrinsic-cconv.ll
 delete mode 100644 llvm/test/CodeGen/X86/patchpoint-webkit_jscc.ll
 delete mode 100644 llvm/test/CodeGen/X86/webkit-jscc.ll

diff --git a/llvm/docs/BitCodeFormat.rst b/llvm/docs/BitCodeFormat.rst
index 5742f8594e99908..46af2e421a258c9 100644
--- a/llvm/docs/BitCodeFormat.rst
+++ b/llvm/docs/BitCodeFormat.rst
@@ -795,7 +795,6 @@ function. The operand fields are:
   * ``ccc``: code 0
   * ``fastcc``: code 8
   * ``coldcc``: code 9
-  * ``webkit_jscc``: code 12
   * ``anyregcc``: code 13
   * ``preserve_mostcc``: code 14
   * ``preserve_allcc``: code 15
diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst
index 46a4b6d19e71b97..89b01220f58cf14 100644
--- a/llvm/docs/LangRef.rst
+++ b/llvm/docs/LangRef.rst
@@ -343,11 +343,6 @@ added in the future:
     accessed runtime components pinned to specific hardware registers.
     At the moment only X86 supports this convention (both 32 and 64
     bit).
-"``webkit_jscc``" - WebKit's JavaScript calling convention
-    This calling convention has been implemented for `WebKit FTL JIT
-    <https://trac.webkit.org/wiki/FTLJIT>`_. It passes arguments on the
-    stack right to left (as cdecl does), and returns a value in the
-    platform's customary return register.
 "``anyregcc``" - Dynamic calling convention for code patching
     This is a special convention that supports patching an arbitrary code
     sequence in place of a call site. This convention forces the call
diff --git a/llvm/include/llvm/AsmParser/LLToken.h b/llvm/include/llvm/AsmParser/LLToken.h
index 773a1b84ea5330e..c9dcd29b31955dc 100644
--- a/llvm/include/llvm/AsmParser/LLToken.h
+++ b/llvm/include/llvm/AsmParser/LLToken.h
@@ -153,7 +153,6 @@ enum Kind {
   kw_spir_func,
   kw_x86_64_sysvcc,
   kw_win64cc,
-  kw_webkit_jscc,
   kw_anyregcc,
   kw_swiftcc,
   kw_swifttailcc,
diff --git a/llvm/include/llvm/IR/CallingConv.h b/llvm/include/llvm/IR/CallingConv.h
index 40222fa31d978bb..668f0ab4e54de44 100644
--- a/llvm/include/llvm/IR/CallingConv.h
+++ b/llvm/include/llvm/IR/CallingConv.h
@@ -52,8 +52,8 @@ namespace CallingConv {
     /// Used by the High-Performance Erlang Compiler (HiPE).
     HiPE = 11,
 
-    /// Used for stack based JavaScript calls
-    WebKit_JS = 12,
+    /// OBSOLETED - Used for stack based JavaScript calls
+    // WebKit_JS = 12,
 
     /// Used for dynamic register based calls (e.g. stackmap and patchpoint
     /// intrinsics).
diff --git a/llvm/lib/AsmParser/LLLexer.cpp b/llvm/lib/AsmParser/LLLexer.cpp
index 284a4c64c6793ef..da9e9f4a3c9833b 100644
--- a/llvm/lib/AsmParser/LLLexer.cpp
+++ b/llvm/lib/AsmParser/LLLexer.cpp
@@ -610,7 +610,6 @@ lltok::Kind LLLexer::LexIdentifier() {
   KEYWORD(x86_64_sysvcc);
   KEYWORD(win64cc);
   KEYWORD(x86_regcallcc);
-  KEYWORD(webkit_jscc);
   KEYWORD(swiftcc);
   KEYWORD(swifttailcc);
   KEYWORD(anyregcc);
diff --git a/llvm/lib/AsmParser/LLParser.cpp b/llvm/lib/AsmParser/LLParser.cpp
index d3abd16204a4534..b6e571afa4c91f2 100644
--- a/llvm/lib/AsmParser/LLParser.cpp
+++ b/llvm/lib/AsmParser/LLParser.cpp
@@ -1977,7 +1977,6 @@ void LLParser::parseOptionalDLLStorageClass(unsigned &Res) {
 ///   ::= 'spir_kernel'
 ///   ::= 'x86_64_sysvcc'
 ///   ::= 'win64cc'
-///   ::= 'webkit_jscc'
 ///   ::= 'anyregcc'
 ///   ::= 'preserve_mostcc'
 ///   ::= 'preserve_allcc'
@@ -2037,7 +2036,6 @@ bool LLParser::parseOptionalCallingConv(unsigned &CC) {
   case lltok::kw_intel_ocl_bicc: CC = CallingConv::Intel_OCL_BI; break;
   case lltok::kw_x86_64_sysvcc:  CC = CallingConv::X86_64_SysV; break;
   case lltok::kw_win64cc:        CC = CallingConv::Win64; break;
-  case lltok::kw_webkit_jscc:    CC = CallingConv::WebKit_JS; break;
   case lltok::kw_anyregcc:       CC = CallingConv::AnyReg; break;
   case lltok::kw_preserve_mostcc:CC = CallingConv::PreserveMost; break;
   case lltok::kw_preserve_allcc: CC = CallingConv::PreserveAll; break;
diff --git a/llvm/lib/IR/AsmWriter.cpp b/llvm/lib/IR/AsmWriter.cpp
index c738b50a7c721ed..841d70857f9c547 100644
--- a/llvm/lib/IR/AsmWriter.cpp
+++ b/llvm/lib/IR/AsmWriter.cpp
@@ -290,7 +290,6 @@ static void PrintCallingConv(unsigned cc, raw_ostream &Out) {
   default:                         Out << "cc" << cc; break;
   case CallingConv::Fast:          Out << "fastcc"; break;
   case CallingConv::Cold:          Out << "coldcc"; break;
-  case CallingConv::WebKit_JS:     Out << "webkit_jscc"; break;
   case CallingConv::AnyReg:        Out << "anyregcc"; break;
   case CallingConv::PreserveMost:  Out << "preserve_mostcc"; break;
   case CallingConv::PreserveAll:   Out << "preserve_allcc"; break;
diff --git a/llvm/lib/Target/AArch64/AArch64CallingConvention.h b/llvm/lib/Target/AArch64/AArch64CallingConvention.h
index 608a50689cc5b9e..ec46f62d065f77b 100644
--- a/llvm/lib/Target/AArch64/AArch64CallingConvention.h
+++ b/llvm/lib/Target/AArch64/AArch64CallingConvention.h
@@ -40,18 +40,12 @@ bool CC_AArch64_Win64_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
 bool CC_AArch64_Win64_CFGuard_Check(unsigned ValNo, MVT ValVT, MVT LocVT,
                                     CCValAssign::LocInfo LocInfo,
                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
-bool CC_AArch64_WebKit_JS(unsigned ValNo, MVT ValVT, MVT LocVT,
-                          CCValAssign::LocInfo LocInfo,
-                          ISD::ArgFlagsTy ArgFlags, CCState &State);
 bool CC_AArch64_GHC(unsigned ValNo, MVT ValVT, MVT LocVT,
                     CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
                     CCState &State);
 bool RetCC_AArch64_AAPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
                          CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
                          CCState &State);
-bool RetCC_AArch64_WebKit_JS(unsigned ValNo, MVT ValVT, MVT LocVT,
-                             CCValAssign::LocInfo LocInfo,
-                             ISD::ArgFlagsTy ArgFlags, CCState &State);
 } // namespace llvm
 
 #endif
diff --git a/llvm/lib/Target/AArch64/AArch64CallingConvention.td b/llvm/lib/Target/AArch64/AArch64CallingConvention.td
index 117c9cad3916f52..4993b995d881f25 100644
--- a/llvm/lib/Target/AArch64/AArch64CallingConvention.td
+++ b/llvm/lib/Target/AArch64/AArch64CallingConvention.td
@@ -325,31 +325,6 @@ def CC_AArch64_DarwinPCS_ILP32_VarArg : CallingConv<[
            CCAssignToStack<16, 16>>
 ]>;
 
-
-// The WebKit_JS calling convention only passes the first argument (the callee)
-// in register and the remaining arguments on stack. We allow 32bit stack slots,
-// so that WebKit can write partial values in the stack and define the other
-// 32bit quantity as undef.
-let Entry = 1 in
-def CC_AArch64_WebKit_JS : CallingConv<[
-  // Handle i1, i8, i16, i32, and i64 passing in register X0 (W0).
-  CCIfType<[i1, i8, i16], CCPromoteToType<i32>>,
-  CCIfType<[i32], CCAssignToReg<[W0]>>,
-  CCIfType<[i64], CCAssignToReg<[X0]>>,
-
-  // Pass the remaining arguments on the stack instead.
-  CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
-  CCIfType<[i64, f64], CCAssignToStack<8, 8>>
-]>;
-
-let Entry = 1 in
-def RetCC_AArch64_WebKit_JS : CallingConv<[
-  CCIfType<[i32], CCAssignToReg<[W0, W1, W2, W3, W4, W5, W6, W7]>>,
-  CCIfType<[i64], CCAssignToReg<[X0, X1, X2, X3, X4, X5, X6, X7]>>,
-  CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7]>>,
-  CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>
-]>;
-
 //===----------------------------------------------------------------------===//
 // ARM64 Calling Convention for GHC
 //===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
index 693a254f7013f8a..9b8162ce8dd4d0f 100644
--- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
@@ -335,8 +335,6 @@ static unsigned getImplicitScaleFactor(MVT VT) {
 }
 
 CCAssignFn *AArch64FastISel::CCAssignFnForCall(CallingConv::ID CC) const {
-  if (CC == CallingConv::WebKit_JS)
-    return CC_AArch64_WebKit_JS;
   if (CC == CallingConv::GHC)
     return CC_AArch64_GHC;
   if (CC == CallingConv::CFGuard_Check)
@@ -3864,9 +3862,7 @@ bool AArch64FastISel::selectRet(const Instruction *I) {
     // Analyze operands of the call, assigning locations to each operand.
     SmallVector<CCValAssign, 16> ValLocs;
     CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, ValLocs, I->getContext());
-    CCAssignFn *RetCC = CC == CallingConv::WebKit_JS ? RetCC_AArch64_WebKit_JS
-                                                     : RetCC_AArch64_AAPCS;
-    CCInfo.AnalyzeReturn(Outs, RetCC);
+    CCInfo.AnalyzeReturn(Outs, RetCC_AArch64_AAPCS);
 
     // Only handle a single return value for now.
     if (ValLocs.size() != 1)
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index f5193a9f2adf30c..8adecd10289d143 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -6372,8 +6372,6 @@ CCAssignFn *AArch64TargetLowering::CCAssignFnForCall(CallingConv::ID CC,
   switch (CC) {
   default:
     report_fatal_error("Unsupported calling convention.");
-  case CallingConv::WebKit_JS:
-    return CC_AArch64_WebKit_JS;
   case CallingConv::GHC:
     return CC_AArch64_GHC;
   case CallingConv::C:
@@ -6417,8 +6415,7 @@ CCAssignFn *AArch64TargetLowering::CCAssignFnForCall(CallingConv::ID CC,
 
 CCAssignFn *
 AArch64TargetLowering::CCAssignFnForReturn(CallingConv::ID CC) const {
-  return CC == CallingConv::WebKit_JS ? RetCC_AArch64_WebKit_JS
-                                      : RetCC_AArch64_AAPCS;
+  return RetCC_AArch64_AAPCS;
 }
 
 
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
index 1a730a0b955d3d1..f431daee8712d91 100644
--- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
@@ -558,8 +558,6 @@ bool AArch64RegisterInfo::isArgumentRegister(const MachineFunction &MF,
   switch (CC) {
   default:
     report_fatal_error("Unsupported calling convention.");
-  case CallingConv::WebKit_JS:
-    return HasReg(CC_AArch64_WebKit_JS_ArgRegs, Reg);
   case CallingConv::GHC:
     return HasReg(CC_AArch64_GHC_ArgRegs, Reg);
   case CallingConv::C:
diff --git a/llvm/lib/Target/X86/X86CallingConv.td b/llvm/lib/Target/X86/X86CallingConv.td
index 19a295cd109627e..27e4fe0cb7a02fa 100644
--- a/llvm/lib/Target/X86/X86CallingConv.td
+++ b/llvm/lib/Target/X86/X86CallingConv.td
@@ -419,15 +419,6 @@ def RetCC_X86_64_HiPE : CallingConv<[
   CCIfType<[i64], CCAssignToReg<[R15, RBP, RAX, RDX]>>
 ]>;
 
-// X86-64 WebKit_JS return-value convention.
-def RetCC_X86_64_WebKit_JS : CallingConv<[
-  // Promote all types to i64
-  CCIfType<[i8, i16, i32], CCPromoteToType<i64>>,
-
-  // Return: RAX
-  CCIfType<[i64], CCAssignToReg<[RAX]>>
-]>;
-
 def RetCC_X86_64_Swift : CallingConv<[
 
   CCIfSwiftError<CCIfType<[i64], CCAssignToReg<[R12]>>>,
@@ -495,8 +486,7 @@ def RetCC_X86_64 : CallingConv<[
   // HiPE uses RetCC_X86_64_HiPE
   CCIfCC<"CallingConv::HiPE", CCDelegateTo<RetCC_X86_64_HiPE>>,
 
-  // Handle JavaScript calls.
-  CCIfCC<"CallingConv::WebKit_JS", CCDelegateTo<RetCC_X86_64_WebKit_JS>>,
+  // Handle AnyReg calls.
   CCIfCC<"CallingConv::AnyReg", CCDelegateTo<RetCC_X86_64_AnyReg>>,
 
   // Handle Swift calls.
@@ -753,22 +743,6 @@ def CC_X86_64_HiPE : CallingConv<[
   CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>
 ]>;
 
-def CC_X86_64_WebKit_JS : CallingConv<[
-  // Promote i8/i16 arguments to i32.
-  CCIfType<[i8, i16], CCPromoteToType<i32>>,
-
-  // Only the first integer argument is passed in register.
-  CCIfType<[i32], CCAssignToReg<[EAX]>>,
-  CCIfType<[i64], CCAssignToReg<[RAX]>>,
-
-  // The remaining integer arguments are passed on the stack. 32bit integer and
-  // floating-point arguments are aligned to 4 byte and stored in 4 byte slots.
-  // 64bit integer and floating-point arguments are aligned to 8 byte and stored
-  // in 8 byte stack slots.
-  CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
-  CCIfType<[i64, f64], CCAssignToStack<8, 8>>
-]>;
-
 // No explicit register is specified for the AnyReg calling convention. The
 // register allocator may assign the arguments to any free register.
 //
@@ -1112,7 +1086,6 @@ def CC_X86_32 : CallingConv<[
 def CC_X86_64 : CallingConv<[
   CCIfCC<"CallingConv::GHC", CCDelegateTo<CC_X86_64_GHC>>,
   CCIfCC<"CallingConv::HiPE", CCDelegateTo<CC_X86_64_HiPE>>,
-  CCIfCC<"CallingConv::WebKit_JS", CCDelegateTo<CC_X86_64_WebKit_JS>>,
   CCIfCC<"CallingConv::AnyReg", CCDelegateTo<CC_X86_64_AnyReg>>,
   CCIfCC<"CallingConv::Win64", CCDelegateTo<CC_X86_Win64_C>>,
   CCIfCC<"CallingConv::X86_64_SysV", CCDelegateTo<CC_X86_64_C>>,
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index 6dc8cd4b2b3e92a..068119a6332a67b 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -3231,13 +3231,12 @@ bool X86FastISel::fastLowerCall(CallLoweringInfo &CLI) {
   if (Subtarget->useIndirectThunkCalls())
     return false;
 
-  // Handle only C, fastcc, and webkit_js calling conventions for now.
+  // Handle only C and fastcc calling conventions for now.
   switch (CC) {
   default: return false;
   case CallingConv::C:
   case CallingConv::Fast:
   case CallingConv::Tail:
-  case CallingConv::WebKit_JS:
   case CallingConv::Swift:
   case CallingConv::SwiftTail:
   case CallingConv::X86_FastCall:
diff --git a/llvm/test/Bitcode/compatibility-3.6.ll b/llvm/test/Bitcode/compatibility-3.6.ll
index 1bd44076363cfbd..b1f4abf7b8c554e 100644
--- a/llvm/test/Bitcode/compatibility-3.6.ll
+++ b/llvm/test/Bitcode/compatibility-3.6.ll
@@ -307,8 +307,6 @@ declare ghccc void @f.ghccc()
 ; CHECK: declare ghccc void @f.ghccc()
 declare cc11 void @f.cc11()
 ; CHECK: declare cc11 void @f.cc11()
-declare webkit_jscc void @f.webkit_jscc()
-; CHECK: declare webkit_jscc void @f.webkit_jscc()
 declare anyregcc void @f.anyregcc()
 ; CHECK: declare anyregcc void @f.anyregcc()
 declare preserve_mostcc void @f.preserve_mostcc()
diff --git a/llvm/test/Bitcode/compatibility-3.7.ll b/llvm/test/Bitcode/compatibility-3.7.ll
index 777180bbcaa536a..91e55f6eda59f99 100644
--- a/llvm/test/Bitcode/compatibility-3.7.ll
+++ b/llvm/test/Bitcode/compatibility-3.7.ll
@@ -307,8 +307,6 @@ declare ghccc void @f.ghccc()
 ; CHECK: declare ghccc void @f.ghccc()
 declare cc11 void @f.cc11()
 ; CHECK: declare cc11 void @f.cc11()
-declare webkit_jscc void @f.webkit_jscc()
-; CHECK: declare webkit_jscc void @f.webkit_jscc()
 declare anyregcc void @f.anyregcc()
 ; CHECK: declare anyregcc void @f.anyregcc()
 declare preserve_mostcc void @f.preserve_mostcc()
diff --git a/llvm/test/Bitcode/compatibility-3.8.ll b/llvm/test/Bitcode/compatibility-3.8.ll
index 02b074557ad3c66..aa4d8b14968c6e2 100644
--- a/llvm/test/Bitcode/compatibility-3.8.ll
+++ b/llvm/test/Bitcode/compatibility-3.8.ll
@@ -332,8 +332,6 @@ declare ghccc void @f.ghccc()
 ; CHECK: declare ghccc void @f.ghccc()
 declare cc11 void @f.cc11()
 ; CHECK: declare cc11 void @f.cc11()
-declare webkit_jscc void @f.webkit_jscc()
-; CHECK: declare webkit_jscc void @f.webkit_jscc()
 declare anyregcc void @f.anyregcc()
 ; CHECK: declare anyregcc void @f.anyregcc()
 declare preserve_mostcc void @f.preserve_mostcc()
diff --git a/llvm/test/Bitcode/compatibility-3.9.ll b/llvm/test/Bitcode/compatibility-3.9.ll
index 1dbd90cb657ece2..e3c84f6e6007149 100644
--- a/llvm/test/Bitcode/compatibility-3.9.ll
+++ b/llvm/test/Bitcode/compatibility-3.9.ll
@@ -361,8 +361,6 @@ declare ghccc void @f.ghccc()
 ; CHECK: declare ghccc void @f.ghccc()
 declare cc11 void @f.cc11()
 ; CHECK: declare cc11 void @f.cc11()
-declare webkit_jscc void @f.webkit_jscc()
-; CHECK: declare webkit_jscc void @f.webkit_jscc()
 declare anyregcc void @f.anyregcc()
 ; CHECK: declare anyregcc void @f.anyregcc()
 declare preserve_mostcc void @f.preserve_mostcc()
diff --git a/llvm/test/Bitcode/compatibility-4.0.ll b/llvm/test/Bitcode/compatibility-4.0.ll
index d0d9d4f1e3c411b..da5ea0e19639c1b 100644
--- a/llvm/test/Bitcode/compatibility-4.0.ll
+++ b/llvm/test/Bitcode/compatibility-4.0.ll
@@ -361,8 +361,6 @@ declare ghccc void @f.ghccc()
 ; CHECK: declare ghccc void @f.ghccc()
 declare cc11 void @f.cc11()
 ; CHECK: declare cc11 void @f.cc11()
-declare webkit_jscc void @f.webkit_jscc()
-; CHECK: declare webkit_jscc void @f.webkit_jscc()
 declare anyregcc void @f.anyregcc()
 ; CHECK: declare anyregcc void @f.anyregcc()
 declare preserve_mostcc void @f.preserve_mostcc()
diff --git a/llvm/test/Bitcode/compatibility-5.0.ll b/llvm/test/Bitcode/compatibility-5.0.ll
index ced4df6d3fc64a9..7a39ae6256b8059 100644
--- a/llvm/test/Bitcode/compatibility-5.0.ll
+++ b/llvm/test/Bitcode/compatibility-5.0.ll
@@ -361,8 +361,6 @@ declare ghccc void @f.ghccc()
 ; CHECK: declare ghccc void @f.ghccc()
 declare cc11 void @f.cc11()
 ; CHECK: declare cc11 void @f.cc11()
-declare webkit_jscc void @f.webkit_jscc()
-; CHECK: declare webkit_jscc void @f.webkit_jscc()
 declare anyregcc void @f.anyregcc()
 ; CHECK: declare anyregcc void @f.anyregcc()
 declare preserve_mostcc void @f.preserve_mostcc()
diff --git a/llvm/test/Bitcode/compatibility-6.0.ll b/llvm/test/Bitcode/compatibility-6.0.ll
index 01cb5cf6a7f0bb0..4cb1f3bd123cb10 100644
--- a/llvm/test/Bitcode/compatibility-6.0.ll
+++ b/llvm/test/Bitcode/compatibility-6.0.ll
@@ -359,8 +359,6 @@ declare ghccc void @f.ghccc()
 ; CHECK: declare ghccc void @f.ghccc()
 declare cc11 void @f.cc11()
 ; CHECK: declare cc11 void @f.cc11()
-declare webkit_jscc void @f.webkit_jscc()
-; CHECK: declare webkit_jscc void @f.webkit_jscc()
 declare anyregcc void @f.anyregcc()
 ; CHECK: declare anyregcc void @f.anyregcc()
 declare preserve_mostcc void @f.preserve_mostcc()
diff --git a/llvm/test/Bitcode/compatibility.ll b/llvm/test/Bitcode/compatibility.ll
index 90f4c0ff7443b09..8170f18879aafac 100644
--- a/llvm/test/Bitcode/compatibility.ll
+++ b/llvm/test/Bitcode/compatibility.ll
@@ -388,8 +388,6 @@ declare ghccc void @f.ghccc()
 ; CHECK: declare ghccc void @f.ghccc()
 declare cc11 void @f.cc11()
 ; CHECK: declare cc11 void @f.cc11()
-declare webkit_jscc void @f.webkit_jscc()
-; CHECK: declare webkit_jscc void @f.webkit_jscc()
 declare anyregcc void @f.anyregcc()
 ; CHECK: declare anyregcc void @f.anyregcc()
 declare preserve_mostcc void @f.preserve_mostcc()
diff --git a/llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll b/llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll
deleted file mode 100644
index 73e9128e28c1281..000000000000000
--- a/llvm/test/CodeGen/AArch64/arm64-patchpoint-webkit_jscc.ll
+++ /dev/null
@@ -1,118 +0,0 @@
-; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone < %s | FileCheck %s
-; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -fast-isel < %s | FileCheck %s --check-prefix=FAST
-; RUN: llc -mtriple=arm64-apple-darwin -enable-misched=0 -mcpu=cyclone -filetype=obj -o %t %s
-; RUN: llvm-objdump --no-print-imm-hex --triple=arm64-apple-darwin -d %t | FileCheck %s --check-prefix=CHECK-ENCODING
-
-; CHECK-ENCODING-NOT: <unknown>
-; CHECK-ENCODING: mov x16, #281470681743360
-; CHECK-ENCODING: movk x16, #57005, lsl #16
-; CHECK-ENCODING: movk x16, #48879
-
-; One argument will be passed in register, the other will be pushed on the stack.
-; Return value in x0.
-define void @jscall_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
-entry:
-; CHECK-LABEL: jscall_patchpoint_codegen:
-; CHECK:       str x{{.+}}, [sp]
-; CHECK-NEXT:  mov  x0, x{{.+}}
-; CHECK:       Ltmp
-; CHECK-NEXT:  mov  x16, #281470681743360
-; CHECK:  movk  x16, #57005, lsl #16
-; CHECK:  movk  x16, #48879
-; CHECK-NEXT:  blr x16
-; FAST-LABEL:  jscall_patchpoint_codegen:
-; FAST:        str x{{.+}}, [sp]
-; FAST:        Ltmp
-; FAST-NEXT:   mov   x16, #281470681743360
-; FAST-NEXT:   movk  x16, #57005, lsl #16
-; FAST-NEXT:   movk  x16, #48879
-; FAST-NEXT:   blr x16
-  %resolveCall2 = inttoptr i64 281474417671919 to ptr
-  %result = tail call webkit_jscc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 20, ptr %resolveCall2, i32 2, i64 %p4, i64 %p2)
-  %resolveCall3 = inttoptr i64 244837814038255 to ptr
-  tail call webkit_jscc void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 6, i32 20, ptr %resolveCall3, i32 2, i64 %p4, i64 %result)
-  ret void
-}
-
-; Test if the arguments are properly aligned and that we don't store undef arguments.
-define i64 @jscall_patchpoint_codegen2(i64 %callee) {
-entry:
-; CHECK-LABEL: jscall_patchpoint_codegen2:
-; CHECK:       mov w[[REG:[0-9]+]], #6
-; CHECK-NEXT:  str x[[REG]], [sp, #24]
-; CHECK-NEXT:  mov w[[REG:[0-9]+]], #4
-; CHECK-NEXT:  str w[[REG]], [sp, #16]
-; CHECK-NEXT:  mov w[[REG:[0-9]+]], #2
-; CHECK-NEXT:  str x[[REG]], [sp]
-; CHECK:       Ltmp
-; CHECK-NEXT:  mov  x16, #281470681743360
-; CHECK-NEXT:  movk  x16, #57005, lsl #16
-; CHECK-NEXT:  movk  x16, #48879
-; CHECK-NEXT:  blr x16
-; FAST-LABEL:  jscall_patchpoint_codegen2:
-; FAST:        mov [[REG1:x[0-9]+]], #2
-; FAST-NEXT:   mov [[REG2:w[0-9]+]], #4
-; FAST-NEXT:   mov [[REG3:x[0-9]+]], #6
-; FAST-NEXT:   str [[REG1]], [sp]
-; FAST-NEXT:   str [[REG2]], [sp, #16]
-; FAST-NEXT:   str [[REG3]], [sp, #24]
-; FAST:        Ltmp
-; FAST-NEXT:   mov  x16, #281470681743360
-; FAST-NEXT:   movk  x16, #57005, lsl #16
-; FAST-NEXT:   movk  x16, #48879
-; FAST-NEXT:   blr x16
-  %call = inttoptr i64 281474417671919 to ptr
-  %result = call webkit_jscc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 20, ptr %call, i32 6, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6)
-  ret i64 %result
-}
-
-; Test if the arguments are properly aligned and that we don't store undef arguments.
-define i64 @jscall_patchpoint_codegen3(i64 %callee) {
-entry:
-; CHECK-LABEL: jscall_patchpoint_codegen3:
-; CHECK:       mov  w[[REG:[0-9]+]], #10
-; CHECK-NEXT:  str x[[REG]], [sp, #48]
-; CHECK-NEXT:  mov w[[REG:[0-9]+]], #8
-; CHECK-NEXT:  str w[[REG]], [sp, #36]
-; CHECK-NEXT:  mov w[[REG:[0-9]+]], #6
-; CHECK-NEXT:  str x[[REG]], [sp, #24]
-; CHECK-NEXT:  mov w[[REG:[0-9]+]], #4
-; CHECK-NEXT:  str w[[REG]], [sp, #16]
-; CHECK-NEXT:  mov w[[REG:[0-9]+]], #2
-; CHECK-NEXT:  str x[[REG]], [sp]
-; CHECK:       Ltmp
-; CHECK-NEXT:  mov   x16, #281470681743360
-; CHECK-NEXT:  movk  x16, #57005, lsl #16
-; CHECK-NEXT:  movk  x16, #48879
-; CHECK-NEXT:  blr x16
-; FAST-LABEL:  jscall_patchpoint_codegen3:
-; FAST:        mov [[REG1:x[0-9]+]], #2
-; FAST-NEXT:   mov [[REG2:w[0-9]+]], #4
-; FAST-NEXT:   mov [[REG3:x[0-9]+]], #6
-; FAST-NEXT:   mov [[REG4:w[0-9]+]], #8
-; FAST-NEXT:   mov [[REG5:x[0-9]+]], #10
-; FAST-NEXT:   str [[REG1]], [sp]
-; FAST-NEXT:   str [[REG2]], [sp, #16]
-; FAST-NEXT:   str [[REG3]], [sp, #24]
-; FAST-NEXT:   str [[REG4]], [sp, #36]
-; FAST-NEXT:   str [[REG5]], [sp, #48]
-; FAST:        Ltmp
-; FAST-NEXT:   mov   x16, #281470681743360
-; FAST-NEXT:   movk  x16, #57005, lsl #16
-; FAST-NEXT:   movk  x16, #48879
-; FAST-NEXT:   blr x16
-  %call = inttoptr i64 281474417671919 to ptr
-  %result = call webkit_jscc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 20, ptr %call, i32 10, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6, i32 undef, i32 8, i32 undef, i64 10)
-  ret i64 %result
-}
-
-; CHECK-LABEL: test_i16:
-; CHECK: ldrh [[BREG:w[0-9]+]], [sp]
-; CHECK: add {{w[0-9]+}}, w0, [[BREG]]
-define webkit_jscc zeroext i16 @test_i16(i16 zeroext %a, i16 zeroext %b) {
-  %sum = add i16 %a, %b
-  ret i16 %sum
-}
-
-declare void @llvm.experimental.patchpoint.void(i64, i32, ptr, i32, ...)
-declare i64 @llvm.experimental.patchpoint.i64(i64, i32, ptr, i32, ...)
diff --git a/llvm/test/CodeGen/AArch64/arm64-stackmap.ll b/llvm/test/CodeGen/AArch64/arm64-stackmap.ll
index 785c3161fb25ea6..f9d0e2caf69f185 100644
--- a/llvm/test/CodeGen/AArch64/arm64-stackmap.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-stackmap.ll
@@ -14,11 +14,11 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 ; CHECK-NEXT:   .byte 0
 ; CHECK-NEXT:   .short 0
 ; Num Functions
-; CHECK-NEXT:   .long 12
+; CHECK-NEXT:   .long 11
 ; Num LargeConstants
 ; CHECK-NEXT:   .long 3
 ; Num Callsites
-; CHECK-NEXT:   .long 12
+; CHECK-NEXT:   .long 11
 
 ; Functions and stack size
 ; CHECK-NEXT:   .quad _constantargs
@@ -45,9 +45,6 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 ; CHECK-NEXT:   .quad _spilledValue
 ; CHECK-NEXT:   .quad 160
 ; CHECK-NEXT:   .quad 1
-; CHECK-NEXT:   .quad _spilledStackMapValue
-; CHECK-NEXT:   .quad 144
-; CHECK-NEXT:   .quad 1
 ; CHECK-NEXT:   .quad _liveConstant
 ; CHECK-NEXT:   .quad 16
 ; CHECK-NEXT:   .quad 1
@@ -290,29 +287,6 @@ entry:
   ret void
 }
 
-; Spilled stack map values.
-;
-; Verify 23 stack map entries.
-;
-; CHECK-LABEL:  .long L{{.*}}-_spilledStackMapValue
-; CHECK-NEXT:   .short 0
-; CHECK-NEXT:   .short 30
-;
-; Check that at least one is a spilled entry from RBP.
-; Location: Indirect FP + ...
-; CHECK:        .byte 3
-; CHECK-NEXT:   .byte 0
-; CHECK-NEXT:   .short 
-; CHECK-NEXT:   .short 29
-; CHECK-NEXT:   .short  0
-; CHECK-NEXT:   .long
-define webkit_jscc void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29) {
-entry:
-  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 12, i32 16, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29)
-  ret void
-}
-
-
 ; Map a constant value.
 ;
 ; CHECK-LABEL:  .long L{{.*}}-_liveConstant
diff --git a/llvm/test/CodeGen/AArch64/stackmap.ll b/llvm/test/CodeGen/AArch64/stackmap.ll
index 199206bd9e27753..ce7dcc4a59e9a73 100644
--- a/llvm/test/CodeGen/AArch64/stackmap.ll
+++ b/llvm/test/CodeGen/AArch64/stackmap.ll
@@ -9,11 +9,11 @@
 ; CHECK-NEXT:   .byte 0
 ; CHECK-NEXT:   .hword 0
 ; Num Functions
-; CHECK-NEXT:   .word 15
+; CHECK-NEXT:   .word 14
 ; Num LargeConstants
 ; CHECK-NEXT:   .word 4
 ; Num Callsites
-; CHECK-NEXT:   .word 19
+; CHECK-NEXT:   .word 18
 
 ; Functions and stack size
 ; CHECK-NEXT:   .xword constantargs
@@ -40,9 +40,6 @@
 ; CHECK-NEXT:   .xword spilledValue
 ; CHECK-NEXT:   .xword 160
 ; CHECK-NEXT:   .xword 1
-; CHECK-NEXT:   .xword spilledStackMapValue
-; CHECK-NEXT:   .xword 128
-; CHECK-NEXT:   .xword 1
 ; CHECK-NEXT:   .xword liveConstant
 ; CHECK-NEXT:   .xword 16
 ; CHECK-NEXT:   .xword 1
@@ -361,28 +358,6 @@ entry:
   ret void
 }
 
-; Spilled stack map values.
-;
-; Verify 30 stack map entries.
-;
-; CHECK-LABEL:  .word .L{{.*}}-spilledStackMapValue
-; CHECK-NEXT:   .hword 0
-; CHECK-NEXT:   .hword 30
-;
-; Check that at least one is a spilled entry from RBP.
-; Location: Indirect RBP + ...
-; CHECK:        .byte 3
-; CHECK-NEXT:   .byte   0
-; CHECK-NEXT:   .hword 8
-; CHECK-NEXT:   .hword 29
-; CHECK-NEXT:   .hword  0
-; CHECK-NEXT:   .word
-define webkit_jscc void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29) {
-entry:
-  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 12, i32 16, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29)
-  ret void
-}
-
 ; Map a constant value.
 ;
 ; CHECK-LABEL:  .word .L{{.*}}-liveConstant
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll b/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll
index a75f225861034ce..d9a0a0a2a093856 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll
@@ -327,29 +327,6 @@ entry:
   ret void
 }
 
-; Spilled stack map values.
-;
-; Verify 30 stack map entries.
-;
-; CHECK:  .long .L{{.*}}-.L[[spilledStackMapValue_BEGIN]]
-; CHECK-NEXT:   .short 0
-; CHECK-NEXT:   .short 30
-;
-; Check that at least one is a spilled entry from r31.
-; Location: Indirect FP + ...
-; CHECK:        .byte 3
-; CHECK-NEXT:   .byte   0
-; CHECK-NEXT:   .short 
-; CHECK-NEXT:   .short 31
-; CHECK-NEXT:   .short  0
-; CHECK-NEXT:   .long
-define webkit_jscc void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29) {
-entry:
-  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 12, i32 16, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29)
-  ret void
-}
-
-
 ; Map a constant value.
 ;
 ; CHECK:  .long .L{{.*}}-.L[[liveConstant_BEGIN]]
diff --git a/llvm/test/CodeGen/X86/deopt-intrinsic-cconv.ll b/llvm/test/CodeGen/X86/deopt-intrinsic-cconv.ll
deleted file mode 100644
index a6e75b667798d97..000000000000000
--- a/llvm/test/CodeGen/X86/deopt-intrinsic-cconv.ll
+++ /dev/null
@@ -1,34 +0,0 @@
-; RUN: llc < %s | FileCheck %s
-; RUN: llc -debug-only=stackmaps < %s 2>&1 | FileCheck --check-prefix=STACKMAPS %s
-; RUN: opt -disable-output -passes=debugify < %s
-; REQUIRES: asserts
-
-target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
-target triple = "x86_64-apple-macosx10.11.0"
-
-declare webkit_jscc i64  @llvm.experimental.deoptimize.i64(...)
-
-define i64 @caller_1() {
-; CHECK-LABEL: _caller_1:
-; CHECK-NEXT: {{.+cfi.+}}
-; CHECK-NEXT: ##{{.+}}
-; CHECK-NEXT: pushq	%rax
-; CHECK-NEXT: {{.+cfi.+}}
-; CHECK-NEXT: movl	$1140457472, (%rsp)     ## imm = 0x43FA0000
-; CHECK-NEXT: movl	$42, %eax
-; CHECK-NEXT: callq	___llvm_deoptimize
-; CHECK-NEXT: {{Ltmp[0-9]+}}:
-
-entry:
-  %v = call webkit_jscc i64(...) @llvm.experimental.deoptimize.i64(i32 42, float 500.0) [ "deopt"(i32 3) ]
-  ret i64 %v
-}
-
-; STACKMAPS: Stack Maps: callsites:
-; STACKMAPS-NEXT: Stack Maps: callsite 2882400015
-; STACKMAPS-NEXT: Stack Maps:   has 4 locations
-; STACKMAPS-NEXT: Stack Maps: 		Loc 0: Constant 12	[encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 12]
-; STACKMAPS-NEXT: Stack Maps: 		Loc 1: Constant 0	[encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0]
-; STACKMAPS-NEXT: Stack Maps: 		Loc 2: Constant 1	[encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1]
-; STACKMAPS-NEXT: Stack Maps: 		Loc 3: Constant 3	[encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 3]
-; STACKMAPS-NEXT: Stack Maps: 	has 0 live-out registers
diff --git a/llvm/test/CodeGen/X86/patchpoint-webkit_jscc.ll b/llvm/test/CodeGen/X86/patchpoint-webkit_jscc.ll
deleted file mode 100644
index 38d5e4410695f30..000000000000000
--- a/llvm/test/CodeGen/X86/patchpoint-webkit_jscc.ll
+++ /dev/null
@@ -1,82 +0,0 @@
-; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=corei7                             < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 < %s | FileCheck %s --check-prefix=FAST
-
-; Test the webkit_jscc calling convention.
-; One argument will be passed in register, the other will be pushed on the stack.
-; Return value in $rax.
-define void @jscall_patchpoint_codegen(i64 %p1, i64 %p2, i64 %p3, i64 %p4) {
-entry:
-; CHECK-LABEL: jscall_patchpoint_codegen:
-; CHECK:      movq %r{{.+}}, (%rsp)
-; CHECK:      movq %r{{.+}}, %rax
-; CHECK:      Ltmp
-; CHECK-NEXT: movabsq $-559038736, %r11
-; CHECK-NEXT: callq *%r11
-; CHECK:      movq %rax, (%rsp)
-; CHECK:      callq
-; FAST-LABEL: jscall_patchpoint_codegen:
-; FAST:       movq %r{{.+}}, (%rsp)
-; FAST:       movq %r{{.+}}, %rax
-; FAST:       Ltmp
-; FAST-NEXT:  movabsq $-559038736, %r11
-; FAST-NEXT:  callq *%r11
-; FAST:       movq %rax, (%rsp)
-; FAST:       callq
-  %resolveCall2 = inttoptr i64 -559038736 to ptr
-  %result = tail call webkit_jscc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 5, i32 15, ptr %resolveCall2, i32 2, i64 %p4, i64 %p2)
-  %resolveCall3 = inttoptr i64 -559038737 to ptr
-  tail call webkit_jscc void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 6, i32 15, ptr %resolveCall3, i32 2, i64 %p4, i64 %result)
-  ret void
-}
-
-; Test if the arguments are properly aligned and that we don't store undef arguments.
-define i64 @jscall_patchpoint_codegen2(i64 %callee) {
-entry:
-; CHECK-LABEL: jscall_patchpoint_codegen2:
-; CHECK:      movq $6, 24(%rsp)
-; CHECK-NEXT: movl $4, 16(%rsp)
-; CHECK-NEXT: movq $2, (%rsp)
-; CHECK:      Ltmp
-; CHECK-NEXT: movabsq $-559038736, %r11
-; CHECK-NEXT: callq *%r11
-; FAST-LABEL: jscall_patchpoint_codegen2:
-; FAST:       movq $2, (%rsp)
-; FAST-NEXT:  movl $4, 16(%rsp)
-; FAST-NEXT:  movq $6, 24(%rsp)
-; FAST:       Ltmp
-; FAST-NEXT:  movabsq $-559038736, %r11
-; FAST-NEXT:  callq *%r11
-  %call = inttoptr i64 -559038736 to ptr
-  %result = call webkit_jscc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 15, ptr %call, i32 6, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6)
-  ret i64 %result
-}
-
-; Test if the arguments are properly aligned and that we don't store undef arguments.
-define i64 @jscall_patchpoint_codegen3(i64 %callee) {
-entry:
-; CHECK-LABEL: jscall_patchpoint_codegen3:
-; CHECK:      movq $10, 48(%rsp)
-; CHECK-NEXT: movl  $8, 36(%rsp)
-; CHECK-NEXT: movq  $6, 24(%rsp)
-; CHECK-NEXT: movl  $4, 16(%rsp)
-; CHECK-NEXT: movq  $2, (%rsp)
-; CHECK:      Ltmp
-; CHECK-NEXT: movabsq $-559038736, %r11
-; CHECK-NEXT: callq *%r11
-; FAST-LABEL: jscall_patchpoint_codegen3:
-; FAST:       movq  $2, (%rsp)
-; FAST-NEXT:  movl  $4, 16(%rsp)
-; FAST-NEXT:  movq  $6, 24(%rsp)
-; FAST-NEXT:  movl  $8, 36(%rsp)
-; FAST-NEXT:  movq $10, 48(%rsp)
-; FAST:       Ltmp
-; FAST-NEXT:  movabsq $-559038736, %r11
-; FAST-NEXT:  callq *%r11
-  %call = inttoptr i64 -559038736 to ptr
-  %result = call webkit_jscc i64 (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.i64(i64 7, i32 15, ptr %call, i32 10, i64 %callee, i64 2, i64 undef, i32 4, i32 undef, i64 6, i32 undef, i32 8, i32 undef, i64 10)
-  ret i64 %result
-}
-
-declare void @llvm.experimental.patchpoint.void(i64, i32, ptr, i32, ...)
-declare i64 @llvm.experimental.patchpoint.i64(i64, i32, ptr, i32, ...)
-
diff --git a/llvm/test/CodeGen/X86/stackmap.ll b/llvm/test/CodeGen/X86/stackmap.ll
index 5a34669d73b250a..33180a7db893dc0 100644
--- a/llvm/test/CodeGen/X86/stackmap.ll
+++ b/llvm/test/CodeGen/X86/stackmap.ll
@@ -9,11 +9,11 @@
 ; CHECK-NEXT:   .byte 0
 ; CHECK-NEXT:   .short 0
 ; Num Functions
-; CHECK-NEXT:   .long 17
+; CHECK-NEXT:   .long 16
 ; Num LargeConstants
 ; CHECK-NEXT:   .long 4
 ; Num Callsites
-; CHECK-NEXT:   .long 21
+; CHECK-NEXT:   .long 20
 
 ; Functions and stack size
 ; CHECK-NEXT:   .quad _constantargs
@@ -40,9 +40,6 @@
 ; CHECK-NEXT:   .quad _spilledValue
 ; CHECK-NEXT:   .quad 8
 ; CHECK-NEXT:   .quad 1
-; CHECK-NEXT:   .quad _spilledStackMapValue
-; CHECK-NEXT:   .quad 8
-; CHECK-NEXT:   .quad 1
 ; CHECK-NEXT:   .quad _spillSubReg
 ; CHECK-NEXT:   .quad 56
 ; CHECK-NEXT:   .quad 1
@@ -367,28 +364,6 @@ entry:
   ret void
 }
 
-; Spilled stack map values.
-;
-; Verify 17 stack map entries.
-;
-; CHECK-LABEL:  .long L{{.*}}-_spilledStackMapValue
-; CHECK-NEXT:   .short 0
-; CHECK-NEXT:   .short 17
-;
-; Check that at least one is a spilled entry from RBP.
-; Location: Indirect RBP + ...
-; CHECK:        .byte 3
-; CHECK-NEXT:   .byte   0
-; CHECK-NEXT:   .short 8
-; CHECK-NEXT:   .short 6
-; CHECK-NEXT:   .short  0
-; CHECK-NEXT:   .long
-define webkit_jscc void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) {
-entry:
-  call void (i64, i32, ...) @llvm.experimental.stackmap(i64 12, i32 15, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16)
-  ret void
-}
-
 ; Spill a subregister stackmap operand.
 ;
 ; CHECK-LABEL:  .long L{{.*}}-_spillSubReg
diff --git a/llvm/test/CodeGen/X86/webkit-jscc.ll b/llvm/test/CodeGen/X86/webkit-jscc.ll
deleted file mode 100644
index a58c53e024ec2c1..000000000000000
--- a/llvm/test/CodeGen/X86/webkit-jscc.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=corei7 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=corei7 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-windows-gnu -mcpu=corei7 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-windows-msvc -mcpu=corei7 < %s | FileCheck %s
-
-define webkit_jscc i32 @simple_jscall(i32 %a, i32 %b, i32 %c) {
-  %ab = add i32 %a, %b
-  %abc = add i32 %ab, %c
-  ret i32 %abc
-}
-
-; 32-bit integers are only aligned to 4 bytes, even on x64. They are *not*
-; promoted to i64.
-
-; CHECK: simple_jscall:
-; CHECK: addl 8(%rsp), %eax
-; CHECK-NEXT: addl 12(%rsp), %eax
-; CHECK-NEXT: retq
diff --git a/llvm/utils/emacs/llvm-mode.el b/llvm/utils/emacs/llvm-mode.el
index 53381cf91b17b90..5264ea260f57c1d 100644
--- a/llvm/utils/emacs/llvm-mode.el
+++ b/llvm/utils/emacs/llvm-mode.el
@@ -56,7 +56,7 @@
          "true" "false" "null" "undef" "zeroinitializer" "none" "c" "asm" "blockaddress" "poison"
 
          ;; Calling conventions
-         "ccc" "fastcc" "coldcc" "webkit_jscc" "anyregcc" "preserve_mostcc" "preserve_allcc"
+         "ccc" "fastcc" "coldcc" "anyregcc" "preserve_mostcc" "preserve_allcc"
          "cxx_fast_tlscc" "swiftcc" "tailcc" "swifttailcc" "cfguard_checkcc"
          ;; Visibility styles
          "default" "hidden" "protected"
diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
index 9eb012a971efb79..ccf6f8b677e86ad 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
@@ -160,8 +160,6 @@ def CConvFast : LLVM_EnumAttrCase<"Fast", "fastcc", "Fast", 8>;
 def CConvCold : LLVM_EnumAttrCase<"Cold", "coldcc", "Cold", 9>;
 def CConvGHC : LLVM_EnumAttrCase<"GHC", "cc_10", "GHC", 10>;
 def CConvHiPE : LLVM_EnumAttrCase<"HiPE", "cc_11", "HiPE", 11>;
-def CConvWebKitJS : LLVM_EnumAttrCase<"WebKit_JS", "webkit_jscc",
-                                      "WebKit_JS", 12>;
 def CConvAnyReg : LLVM_EnumAttrCase<"AnyReg", "anyregcc", "AnyReg", 13>;
 def CConvPreserveMost : LLVM_EnumAttrCase<"PreserveMost", "preserve_mostcc",
                                           "PreserveMost", 14>;

>From a1e2c746d8e4cb82976e1b08c6b21d9ee015dba8 Mon Sep 17 00:00:00 2001
From: Juergen Ributzka <juergen at ributzka.de>
Date: Tue, 7 Nov 2023 11:54:40 -0800
Subject: [PATCH 2/2] Remove WebKit CC from MLIR

---
 llvm/include/llvm-c/Core.h                    | 1 -
 mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td | 2 +-
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/llvm/include/llvm-c/Core.h b/llvm/include/llvm-c/Core.h
index 4fc88b2b64eacea..a5e69a5e1893302 100644
--- a/llvm/include/llvm-c/Core.h
+++ b/llvm/include/llvm-c/Core.h
@@ -216,7 +216,6 @@ typedef enum {
   LLVMColdCallConv          = 9,
   LLVMGHCCallConv           = 10,
   LLVMHiPECallConv          = 11,
-  LLVMWebKitJSCallConv      = 12,
   LLVMAnyRegCallConv        = 13,
   LLVMPreserveMostCallConv  = 14,
   LLVMPreserveAllCallConv   = 15,
diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
index ccf6f8b677e86ad..f05230526c21f55 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
@@ -252,7 +252,7 @@ def CConvEnum : LLVM_CEnumAttr<
     "CConv",
     "::llvm::CallingConv",
     "Calling Conventions",
-    [CConvC, CConvFast, CConvCold, CConvGHC, CConvHiPE, CConvWebKitJS,
+    [CConvC, CConvFast, CConvCold, CConvGHC, CConvHiPE,
      CConvAnyReg, CConvPreserveMost, CConvPreserveAll, CConvSwift,
      CConvCXXFastTLS, CConvTail, CConvCFGuard_Check, CConvSwiftTail,
      CConvX86_StdCall, CConvX86_FastCall, CConvARM_APCS,



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