[llvm] [CodeGen] Handling Oversized Alloca Types under 32 bit Mode to Avoid Code Generator Crash (PR #71472)

Qiongsi Wu via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 7 08:21:45 PST 2023


qiongsiwu wrote:

> Does GlobalISel need the same change?

Thanks for pointing out GlobalISel. I suspect we do not need the _exact_ same change because IRTranslator already takes care if restricting the constant bitwidth. See https://github.com/llvm/llvm-project/blob/75d6795e420274346b14aca8b6bd49bfe6030eeb/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp#L2861

The new test case can proceed to the legalizer with `-mtriple=riscv[64|32]-unknown-linux-gnu -global-isel`, but both fails in the legalizer with errors
```
# 64 bit
LLVM ERROR: unable to legalize instruction: %14:_(p0) = G_DYN_STACKALLOC %13:_(s64), 1 (in function: test_oversized)
# 32 bit
LLVM ERROR: unable to legalize instruction: %12:_(p0) = G_DYN_STACKALLOC %11:_(s32), 1 (in function: test_oversized)
```
This does not look like the same issue as the one this PR is fixing. If it is reasonable, I prefer leaving this PR fixing the selection DAG, and open an separate issue for GlobalISel. 

Does this sound reasonable? 

https://github.com/llvm/llvm-project/pull/71472


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