[llvm] 9b24391 - Revert "RegisterCoalescer: Generate test checks"

Mitch Phillips via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 7 06:09:47 PST 2023


Author: Mitch Phillips
Date: 2023-11-07T15:09:08+01:00
New Revision: 9b2439167d9f794e317fecbdbb0a6e96f9ea4b56

URL: https://github.com/llvm/llvm-project/commit/9b2439167d9f794e317fecbdbb0a6e96f9ea4b56
DIFF: https://github.com/llvm/llvm-project/commit/9b2439167d9f794e317fecbdbb0a6e96f9ea4b56.diff

LOG: Revert "RegisterCoalescer: Generate test checks"

This reverts commit 9832eb4bdd92e876a59fea5a3502572dc9bcf870.

Reason: Dependency on change that was reverted in
https://github.com/llvm/llvm-project/commit/ba385ae210b3659bc9dfb78ef1d280d03c2c3b5a

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir b/llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
index 190b14052d9b6f6..14220ee01131f9a 100644
--- a/llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
+++ b/llvm/test/CodeGen/X86/coalescer-implicit-def-regression-imp-operand-assert.mir
@@ -1,39 +1,8 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
-# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=register-coalescer -o - %s | FileCheck %s
+# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=register-coalescer -o - %s
 ---
 name:  rematerialize_subreg_to_reg_added_impdef_1
 tracksRegLiveness: true
 body:             |
-  ; CHECK-LABEL: name: rematerialize_subreg_to_reg_added_impdef_1
-  ; CHECK: bb.0:
-  ; CHECK-NEXT:   successors: %bb.1(0x2aaaaaab), %bb.2(0x55555555)
-  ; CHECK-NEXT:   liveins: $edi
-  ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   undef [[MOV32r0_:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = MOV32r0 implicit-def dead $eflags, implicit-def [[MOV32r0_]]
-  ; CHECK-NEXT:   JCC_1 %bb.2, 5, implicit killed undef $eflags
-  ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT: bb.1:
-  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
-  ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   JMP_1 %bb.3
-  ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT: bb.2:
-  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
-  ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   [[MOV32r0_:%[0-9]+]]:gr64_with_sub_8bit = IMPLICIT_DEF
-  ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT: bb.3:
-  ; CHECK-NEXT:   successors: %bb.4(0x30000000), %bb.5(0x50000000)
-  ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   JCC_1 %bb.5, 5, implicit killed undef $eflags
-  ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT: bb.4:
-  ; CHECK-NEXT:   dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $al, implicit-def $al
-  ; CHECK-NEXT:   RET 0, killed undef $al
-  ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT: bb.5:
-  ; CHECK-NEXT:   MOV64mr undef $noreg, 1, undef $noreg, 0, undef $noreg, [[MOV32r0_]] :: (store (s64))
-  ; CHECK-NEXT:   RET 0, killed undef $al
   bb.0:
     successors: %bb.1(0x2aaaaaab), %bb.2(0x55555555)
     liveins: $edi


        


More information about the llvm-commits mailing list