[llvm] 013d1ca - RegisterCoalescer: Clear isSSA property
    Matt Arsenault via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Tue Nov  7 05:44:02 PST 2023
    
    
  
Author: Matt Arsenault
Date: 2023-11-07T22:43:46+09:00
New Revision: 013d1ca9b529e8079905d714806cb4cce3c8f764
URL: https://github.com/llvm/llvm-project/commit/013d1ca9b529e8079905d714806cb4cce3c8f764
DIFF: https://github.com/llvm/llvm-project/commit/013d1ca9b529e8079905d714806cb4cce3c8f764.diff
LOG: RegisterCoalescer: Clear isSSA property
Fix some expensive checks verifier errors on MIR tests.
Added: 
    
Modified: 
    llvm/lib/CodeGen/RegisterCoalescer.cpp
Removed: 
    
################################################################################
diff  --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp
index 016979f40cdf033..0ea22bab5ab473c 100644
--- a/llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -387,6 +387,11 @@ namespace {
 
     void getAnalysisUsage(AnalysisUsage &AU) const override;
 
+    MachineFunctionProperties getClearedProperties() const override {
+      return MachineFunctionProperties().set(
+          MachineFunctionProperties::Property::IsSSA);
+    }
+
     void releaseMemory() override;
 
     /// This is the pass entry point.
        
    
    
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