[llvm] [AMDGPU] Folding imm offset in more cases for scratch access (PR #70634)

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Tue Nov 7 05:07:22 PST 2023


================
@@ -1146,13 +1146,58 @@ bool AMDGPUDAGToDAGISel::isDSOffset2Legal(SDValue Base, unsigned Offset0,
   return CurDAG->SignBitIsZero(Base);
 }
 
-bool AMDGPUDAGToDAGISel::isFlatScratchBaseLegal(SDValue Base,
+// Check that the address value of flat scratch load/store being put into
+// SGPR/VGPR is legal with respect to hardware's requirement that address in
+// SGPR/VGPR should be unsigned. When \p CheckTwoInstrs is set, we will check
+// against the last two instructions which calculate \p FullAddr. When \p
+// CheckTwoOperands is set, we will check both operands (In case of two
+// instructions, they are the operands from the instruction before the last).
+bool AMDGPUDAGToDAGISel::isFlatScratchBaseLegal(SDValue FullAddr,
+                                                bool CheckTwoInstrs,
+                                                bool CheckTwoOperands,
                                                 uint64_t FlatVariant) const {
   if (FlatVariant != SIInstrFlags::FlatScratch)
     return true;
-  // When value in 32-bit Base can be negative calculate scratch offset using
-  // 32-bit add instruction, otherwise use Base(unsigned) + offset.
-  return CurDAG->SignBitIsZero(Base);
+
+  // whether we can prove the operands are non-negative from operation.
+  auto HasOnlyNonNegativeOperands = [](SDValue Addr) -> bool {
+    return (Addr.getOpcode() == ISD::ADD &&
+            Addr->getFlags().hasNoUnsignedWrap()) ||
+           Addr->getOpcode() == ISD::OR;
+  };
+
+  if (CheckTwoInstrs) {
+    auto PartAddr = FullAddr.getOperand(0);
+    // Make sure we are doing SGPR + VGPR + Imm.
+    assert(isa<ConstantSDNode>(FullAddr.getOperand(1)));
+    if (HasOnlyNonNegativeOperands(FullAddr) &&
+        HasOnlyNonNegativeOperands(PartAddr))
+      return true;
----------------
jayfoad wrote:

Could also return true if Imm is negative and HasOnlyNonNegativeOperands(PartAddr)

https://github.com/llvm/llvm-project/pull/70634


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