[llvm] 0a362f1 - [IR] Mark mul and ashr const exprs as undesirable

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2023-11-07T10:42:14+01:00
New Revision: 0a362f12ec60a49a054befec8620a8e69523af54

URL: https://github.com/llvm/llvm-project/commit/0a362f12ec60a49a054befec8620a8e69523af54
DIFF: https://github.com/llvm/llvm-project/commit/0a362f12ec60a49a054befec8620a8e69523af54.diff

LOG: [IR] Mark mul and ashr const exprs as undesirable

These will no longer be created by default, but can still be
created explicitly.

Added: 
    

Modified: 
    llvm/lib/IR/Constants.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/IR/Constants.cpp b/llvm/lib/IR/Constants.cpp
index 4e480691558f043..0005b2f2dc54389 100644
--- a/llvm/lib/IR/Constants.cpp
+++ b/llvm/lib/IR/Constants.cpp
@@ -2133,13 +2133,13 @@ bool ConstantExpr::isDesirableBinOp(unsigned Opcode) {
   case Instruction::FRem:
   case Instruction::And:
   case Instruction::Or:
+  case Instruction::Mul:
+  case Instruction::AShr:
     return false;
   case Instruction::Add:
   case Instruction::Sub:
-  case Instruction::Mul:
   case Instruction::Shl:
   case Instruction::LShr:
-  case Instruction::AShr:
   case Instruction::Xor:
     return true;
   default: